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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - [X86] Split vector schedule classes by vector width only as necessary"
href="https://bugs.llvm.org/show_bug.cgi?id=36924">36924</a>
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<th>Summary</th>
<td>[X86] Split vector schedule classes by vector width only as necessary
</td>
</tr>
<tr>
<th>Product</th>
<td>libraries
</td>
</tr>
<tr>
<th>Version</th>
<td>trunk
</td>
</tr>
<tr>
<th>Hardware</th>
<td>PC
</td>
</tr>
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<th>OS</th>
<td>Windows NT
</td>
</tr>
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<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Severity</th>
<td>enhancement
</td>
</tr>
<tr>
<th>Priority</th>
<td>P
</td>
</tr>
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<th>Component</th>
<td>Backend: X86
</td>
</tr>
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
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<th>Reporter</th>
<td>llvm-dev@redking.me.uk
</td>
</tr>
<tr>
<th>CC</th>
<td>andrea.dibiagio@gmail.com, clement.courbet@gmail.com, craig.topper@gmail.com, llvm-bugs@lists.llvm.org, spatel+llvm@rotateright.com
</td>
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<th>Blocks</th>
<td>36908
</td>
</tr></table>
<p>
<div>
<pre>Many targets have different schedule costs for 128/256/512-bit rr and rm
versions of various SSE instructions (e.g. WriteFADD:
ADDSS/ADDPS/VADDPS/VADDPSY/VADDPSZ).
Given that we're overriding them anyhow means that we will generate multiple
scheduler class entries so we should probably just create separate schedule
classes for them.
But, similar to [<a class="bz_bug_link
bz_status_NEW "
title="NEW - [X86] Remove Schedule classes from models that don't use them"
href="show_bug.cgi?id=35608">Bug #35608</a>], it'd be useful to avoid having to define all
these classes for cases where they don't differ or are not supported - so some
kind of default inheritence would be very useful.
e.g.
WriteFADD_SSE : WriteFADD
WriteFADD_AVX128 : WriteFADD
WriteFADD_AVX256 : WriteFADD
WriteFADD_AVX512 : WriteFADD
Or maybe some mechanism with SchedAlias, or could we introduce something like
SchedDefaultAlias?</pre>
</div>
</p>
<div id="referenced">
<hr style="border: 1px dashed #969696">
<b>Referenced Bugs:</b>
<ul>
<li>
[<a class="bz_bug_link
bz_status_NEW "
title="NEW - [meta][x86] Improve scheduler classes instruction coverage"
href="https://bugs.llvm.org/show_bug.cgi?id=36908">Bug 36908</a>] [meta][x86] Improve scheduler classes instruction coverage
</li>
</ul>
</div>
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