<html>
<head>
<base href="https://bugs.llvm.org/">
</head>
<body><table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - [meta][x86] Improve scheduler classes instruction coverage"
href="https://bugs.llvm.org/show_bug.cgi?id=36908">36908</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>[meta][x86] Improve scheduler classes instruction coverage
</td>
</tr>
<tr>
<th>Product</th>
<td>libraries
</td>
</tr>
<tr>
<th>Version</th>
<td>trunk
</td>
</tr>
<tr>
<th>Hardware</th>
<td>PC
</td>
</tr>
<tr>
<th>OS</th>
<td>Windows NT
</td>
</tr>
<tr>
<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Severity</th>
<td>enhancement
</td>
</tr>
<tr>
<th>Priority</th>
<td>P
</td>
</tr>
<tr>
<th>Component</th>
<td>Backend: X86
</td>
</tr>
<tr>
<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
<tr>
<th>Reporter</th>
<td>llvm-dev@redking.me.uk
</td>
</tr>
<tr>
<th>CC</th>
<td>llvm-bugs@lists.llvm.org
</td>
</tr>
<tr>
<th>Depends on</th>
<td>32857, 35587, 35608, 36881
</td>
</tr>
<tr>
<th>Blocks</th>
<td>32325
</td>
</tr></table>
<p>
<div>
<pre>We've tended to avoid introducing too many scheduler classes, especially as not
all targets need to support them [<a class="bz_bug_link
bz_status_NEW "
title="NEW - [X86] Remove Schedule classes from models that don't use them"
href="show_bug.cgi?id=35608">Bug #35608</a>].
However, we could considerably reduce the number of custom InstRW entries if we
were smarter about the instructions attached to each class - adding/splitting
classes, etc.</pre>
</div>
</p>
<div id="referenced">
<hr style="border: 1px dashed #969696">
<b>Referenced Bugs:</b>
<ul>
<li>
[<a class="bz_bug_link
bz_status_NEW "
title="NEW - [META][X86] Improve implementation and use of X86 scheduler models"
href="https://bugs.llvm.org/show_bug.cgi?id=32325">Bug 32325</a>] [META][X86] Improve implementation and use of X86 scheduler models
</li>
<li>
[<a class="bz_bug_link
bz_status_NEW "
title="NEW - Add scheduler classes for vector masked load/store operations"
href="https://bugs.llvm.org/show_bug.cgi?id=32857">Bug 32857</a>] Add scheduler classes for vector masked load/store operations
</li>
<li>
[<a class="bz_bug_link
bz_status_ASSIGNED "
title="ASSIGNED - [X86] Scheduler information missing for CRC32 instructions on haswell, broadwell, skylake"
href="https://bugs.llvm.org/show_bug.cgi?id=35587">Bug 35587</a>] [X86] Scheduler information missing for CRC32 instructions on haswell, broadwell, skylake
</li>
<li>
[<a class="bz_bug_link
bz_status_NEW "
title="NEW - [X86] Remove Schedule classes from models that don't use them"
href="https://bugs.llvm.org/show_bug.cgi?id=35608">Bug 35608</a>] [X86] Remove Schedule classes from models that don't use them
</li>
<li>
[<a class="bz_bug_link
bz_status_NEW "
title="NEW - [X86] TZCNT/LZCNT/BSR/BSF have weird SchedRW"
href="https://bugs.llvm.org/show_bug.cgi?id=36881">Bug 36881</a>] [X86] TZCNT/LZCNT/BSR/BSF have weird SchedRW
</li>
</ul>
</div>
<br>
<hr>
<span>You are receiving this mail because:</span>
<ul>
<li>You are on the CC list for the bug.</li>
</ul>
</body>
</html>