<html>
<head>
<base href="https://bugs.llvm.org/">
</head>
<body><table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - Aarch64: support rN register names"
href="https://bugs.llvm.org/show_bug.cgi?id=36862">36862</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>Aarch64: support rN register names
</td>
</tr>
<tr>
<th>Product</th>
<td>clang
</td>
</tr>
<tr>
<th>Version</th>
<td>unspecified
</td>
</tr>
<tr>
<th>Hardware</th>
<td>PC
</td>
</tr>
<tr>
<th>OS</th>
<td>Linux
</td>
</tr>
<tr>
<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Severity</th>
<td>enhancement
</td>
</tr>
<tr>
<th>Priority</th>
<td>P
</td>
</tr>
<tr>
<th>Component</th>
<td>-New Bugs
</td>
</tr>
<tr>
<th>Assignee</th>
<td>unassignedclangbugs@nondot.org
</td>
</tr>
<tr>
<th>Reporter</th>
<td>manojgupta@google.com
</td>
</tr>
<tr>
<th>CC</th>
<td>llozano@chromium.org, llvm-bugs@lists.llvm.org, ndesaulniers@google.com, srhines@google.com
</td>
</tr></table>
<p>
<div>
<pre>Verbatim copied from
<a href="https://bugs.chromium.org/p/chromium/issues/detail?id=824526">https://bugs.chromium.org/p/chromium/issues/detail?id=824526</a>
The upstream kernel commit f2d3b2e8759a ("arm/arm64: smccc: Implement SMCCC
v1.1 inline primitive")
(<a href="https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=f2d3b2e8759a5833df6f022e42df2d581e6d843c">https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=f2d3b2e8759a5833df6f022e42df2d581e6d843c</a>)
uses the names "r0", "r1", ... for the general purpose registers that are
usually known as "x0", "x1", ...
Use of the rN register names for arm64 is supported by gcc, but not by clang,
in consequence upstream kernels and v4.14 (LTS/CrOS) currently don't build with
clang for arm64.
Kernel maintainers don't seem to be inclined to use the xN names, probably also
because the code in question is shared between arm64 and arm32, and arm32
registers are named rN.
"I'd say this is really a bug in Clang. Architecturally, the register in
AArch64 state is still named "r0"; "x0"/"w0" are assembler operands which
additionally encode the size of the corresponding *access* to r0."
<a href="https://lkml.org/lkml/2018/3/1/186">https://lkml.org/lkml/2018/3/1/186</a>
Maintainers might accept a fix, but expect LLVM to work on supporting rN
register names for arm64 in future releases:
"It would be preferable to see evidence of the llvm community committing to fix
this before we consider merging a bodge into Linux for it."</pre>
</div>
</p>
<hr>
<span>You are receiving this mail because:</span>
<ul>
<li>You are on the CC list for the bug.</li>
</ul>
</body>
</html>