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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - [X86] SkylakeServer scheduler model doesn't account for port 0 and 1 being joined for 512 bit operations"
href="https://bugs.llvm.org/show_bug.cgi?id=36828">36828</a>
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<th>Summary</th>
<td>[X86] SkylakeServer scheduler model doesn't account for port 0 and 1 being joined for 512 bit operations
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<th>Product</th>
<td>libraries
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<th>Version</th>
<td>trunk
</td>
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<th>Hardware</th>
<td>PC
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<th>OS</th>
<td>Windows NT
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<th>Status</th>
<td>NEW
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<th>Severity</th>
<td>enhancement
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<th>Priority</th>
<td>P
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<th>Component</th>
<td>Backend: X86
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>craig.topper@gmail.com
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<th>CC</th>
<td>llvm-bugs@lists.llvm.org
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<p>
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<pre>I'm not sure how to model this in the scheduler, but 512 bit ALU instructions
need to go out on port 0 and 1 simultaneously or on port 5.</pre>
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