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      <base href="https://bugs.llvm.org/">
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    <body><table border="1" cellspacing="0" cellpadding="8">
        <tr>
          <th>Bug ID</th>
          <td><a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - most llvm.experimental.vector.reduce intrinsics fail for most vector types on AArch64 only"
   href="https://bugs.llvm.org/show_bug.cgi?id=36796">36796</a>
          </td>
        </tr>

        <tr>
          <th>Summary</th>
          <td>most llvm.experimental.vector.reduce intrinsics fail for most vector types on AArch64 only
          </td>
        </tr>

        <tr>
          <th>Product</th>
          <td>libraries
          </td>
        </tr>

        <tr>
          <th>Version</th>
          <td>trunk
          </td>
        </tr>

        <tr>
          <th>Hardware</th>
          <td>PC
          </td>
        </tr>

        <tr>
          <th>OS</th>
          <td>All
          </td>
        </tr>

        <tr>
          <th>Status</th>
          <td>NEW
          </td>
        </tr>

        <tr>
          <th>Severity</th>
          <td>enhancement
          </td>
        </tr>

        <tr>
          <th>Priority</th>
          <td>P
          </td>
        </tr>

        <tr>
          <th>Component</th>
          <td>Backend: AArch64
          </td>
        </tr>

        <tr>
          <th>Assignee</th>
          <td>unassignedbugs@nondot.org
          </td>
        </tr>

        <tr>
          <th>Reporter</th>
          <td>gonzalobg88@gmail.com
          </td>
        </tr>

        <tr>
          <th>CC</th>
          <td>llvm-bugs@lists.llvm.org
          </td>
        </tr></table>
      <p>
        <div>
        <pre>Most of the llvm.experimental.vector.reduce intrinsics fail to lower on AArch64
only -
 they generate correct code in other targets, including the ARM target.

Example:

declare i8 @llvm.experimental.vector.reduce.mul.i8.v8i8(<8 x i8> %a)
define i8 
    @foo(<8 x i8>* noalias nocapture 
         readonly dereferenceable(16) %val) 
unnamed_addr {
  %a = load <8 x i8>, <8 x i8>* %val, align 16
  %b = tail call 
      i8 @llvm.experimental.vector.reduce.mul.i8.v8i8(<8 x i8> %a)
  ret i8 %b
}

makes the AArch64 backend segfault:

#0 0x0000000001b707da (/opt/compiler-explorer/clang-5.0.0/bin/llc+0x1b707da)
#1 0x0000000001b6e89e (/opt/compiler-explorer/clang-5.0.0/bin/llc+0x1b6e89e)
#2 0x0000000001b6e9ec (/opt/compiler-explorer/clang-5.0.0/bin/llc+0x1b6e9ec)
#3 0x00007f71aeed5390 __restore_rt
(/lib/x86_64-linux-gnu/libpthread.so.0+0x11390)
#4 0x0000000001a91844 (/opt/compiler-explorer/clang-5.0.0/bin/llc+0x1a91844)
#5 0x0000000001ae743c (/opt/compiler-explorer/clang-5.0.0/bin/llc+0x1ae743c)
Stack dump:
0.      Program arguments: /opt/compiler-explorer/clang-5.0.0/bin/llc -o
/tmp/compiler-explorer-compiler118219-63-a628my.hwd0a/output.s
-x86-asm-syntax=intel -O3 -march=aarch64 <source> 
1.      Running pass 'Function Pass Manager' on module '<source>'.
2.      Running pass 'AArch64 Instruction Selection' on function '@foo'
/compiler-explorer/c-preload/compiler-wrapper: line 21:  8596 Segmentation
fault      (core dumped) "$@"
Compiler returned: 139

while replacing mul with other reduction intrinsics some times work, sometimes
error with failed to select instruction, and some times segfault. These errors
are not exclusive of i8 x 8, but also apply to all vector types that I have
tried.</pre>
        </div>
      </p>


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