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<base href="https://bugs.llvm.org/">
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<body><table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - X87 FPU inline assembly input operands loaded after the assembly on x86_32"
href="https://bugs.llvm.org/show_bug.cgi?id=36698">36698</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>X87 FPU inline assembly input operands loaded after the assembly on x86_32
</td>
</tr>
<tr>
<th>Product</th>
<td>libraries
</td>
</tr>
<tr>
<th>Version</th>
<td>trunk
</td>
</tr>
<tr>
<th>Hardware</th>
<td>PC
</td>
</tr>
<tr>
<th>OS</th>
<td>All
</td>
</tr>
<tr>
<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Severity</th>
<td>enhancement
</td>
</tr>
<tr>
<th>Priority</th>
<td>P
</td>
</tr>
<tr>
<th>Component</th>
<td>Backend: X86
</td>
</tr>
<tr>
<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
<tr>
<th>Reporter</th>
<td>martin@martin.st
</td>
</tr>
<tr>
<th>CC</th>
<td>llvm-bugs@lists.llvm.org
</td>
</tr></table>
<p>
<div>
<pre>If building x87 FPU inline assembly for x86_32 with clang, LLVM can reorder the
loads of input arguments to after the actual assembly snippet.
An example function:
void asmfunc(double in, double* outptr) {
double out;
asm("nop":"=t"(out):"0"(in));
if (outptr)
*outptr = out;
}
When built with e.g. "clang -S -O2 x87.c -target i686-linux-gnu -o -", this
produces:
asmfunc: # @asmfunc
# %bb.0: # %entry
subl $12, %esp
movl 24(%esp), %eax
testl %eax, %eax
je .LBB0_2
# %bb.1: # %if.then
movsd 16(%esp), %xmm0 # xmm0 = mem[0],zero
#APP
nop
#NO_APP
movsd %xmm0, (%esp)
fldl (%esp) # <---- Input operand to the #APP
snippet above is loaded too late
fstpl (%eax)
.LBB0_2: # %if.end
addl $12, %esp
retl
If the resulting LLVM IR is lowered with -print-after-all, I get the following
steps:
# *** IR Dump After Post-RA pseudo instruction expansion pass ***:
...
LD_F64m $esp, 1, $noreg, 0, $noreg, implicit-def dead $fpsw;
mem:LD8[FixedStack0](align=4)
INLINEASM &nop [attdialect], $0:[regdef], implicit-def $st0, $1:[reguse
tiedto:$0], killed $st0(tied-def 3), $2:[clobber], implicit-def dead
early-clobber $eflags, !3
ST_FP64m killed renamable $eax, 1, $noreg, 0, $noreg, implicit-def dead
$fpsw; mem:ST8[%outptr](align=4)(tbaa=!5)
...
# *** IR Dump After Post RA top-down list latency scheduler ***:
...
INLINEASM &nop [attdialect], $0:[regdef], implicit-def $st0, $1:[reguse
tiedto
:$0], $st0(tied-def 3), $2:[clobber], implicit-def dead early-clobber $eflags,
!
3
MOVSDmr $esp, 1, $noreg, 0, $noreg, killed renamable $xmm0;
mem:ST8[FixedStack
0](align=4)
LD_F64m $esp, 1, $noreg, 0, $noreg, implicit-def dead $fpsw;
mem:LD8[FixedStac
k0](align=4)
ST_FP64m killed renamable $eax, 1, $noreg, 0, $noreg, implicit-def dead
$fpsw;
mem:ST8[%outptr](align=4)(tbaa=!5)
...
If the inline assembly has the "volatile" attribute added, the resulting code
turns out ok.</pre>
</div>
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