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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - [AMDGPU][MC] v_cvt_f32 with SDWA disassembly"
href="https://bugs.llvm.org/show_bug.cgi?id=36355">36355</a>
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<th>Summary</th>
<td>[AMDGPU][MC] v_cvt_f32 with SDWA disassembly
</td>
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<th>Product</th>
<td>libraries
</td>
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<th>Version</th>
<td>trunk
</td>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>All
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<th>Status</th>
<td>NEW
</td>
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<th>Severity</th>
<td>enhancement
</td>
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<th>Priority</th>
<td>P
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<th>Component</th>
<td>Backend: AMDGPU
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>tcorring@amd.com
</td>
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<th>CC</th>
<td>llvm-bugs@lists.llvm.org
</td>
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<p>
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<pre>Some v_cvt_f32 instructions using SDWA that were compiled by another compiler
fail to disassemble using llvm-mc.
The corresponding instructions do assemble but to a different encoding (which
does then disassemble) which may indicate an incorrect encoding?
e.g.
v_cvt_f32_f16 v6, v6 src0_sel: WORD_1 // 7E0C16F9 00050606
v_cvt_f32_u32 v18, v14 src0_sel: BYTE_0 // 7E240CF9 0000060E</pre>
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