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<base href="https://bugs.llvm.org/">
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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - [X86][AVX512] Failure to fold broadcast into 'zmm' instruction for fake xmm/ymm (NoVLX) instructions"
href="https://bugs.llvm.org/show_bug.cgi?id=36191">36191</a>
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<th>Summary</th>
<td>[X86][AVX512] Failure to fold broadcast into 'zmm' instruction for fake xmm/ymm (NoVLX) instructions
</td>
</tr>
<tr>
<th>Product</th>
<td>libraries
</td>
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<th>Version</th>
<td>trunk
</td>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>Windows NT
</td>
</tr>
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<th>Status</th>
<td>NEW
</td>
</tr>
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<th>Severity</th>
<td>enhancement
</td>
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<th>Priority</th>
<td>P
</td>
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<th>Component</th>
<td>Backend: X86
</td>
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
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<th>Reporter</th>
<td>llvm-dev@redking.me.uk
</td>
</tr>
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<th>CC</th>
<td>craig.topper@gmail.com, llvm-bugs@lists.llvm.org, zvi.rackover@intel.com
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<p>
<div>
<pre>define <4 x i64> @mul_19(<4 x i64>) {
%2 = mul <4 x i64> %0, <i64 19, i64 19, i64 19, i64 19>
ret <4 x i64> %2
}
Without AVX512VL, we cheat and perform many AVX512 xmm/ymm instructions on the
ZMM register. Unfortunately we fail to fold broadcast loads into these,
increasing register pressure:
llc -mattr=+avx512dq,+avx512vl
.LCPI0_0:
.quad 19 # 0x13
_Z6mul_19Dv4_x: # @_Z6mul_19Dv4_x
vpmullq .LCPI0_0(%rip){1to4}, %ymm0, %ymm0
retq
llc -mattr=+avx512dq
.LCPI0_0:
.quad 19 # 0x13
_Z6mul_19Dv4_x: # @_Z6mul_19Dv4_x
vpbroadcastq .LCPI0_0(%rip), %ymm1 # ymm1 = [19,19,19,19]
vpmullq %zmm1, %zmm0, %zmm0
retq</pre>
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