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<base href="https://bugs.llvm.org/">
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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - Stores to union incorrectly reordered"
href="https://bugs.llvm.org/show_bug.cgi?id=36076">36076</a>
</td>
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<tr>
<th>Summary</th>
<td>Stores to union incorrectly reordered
</td>
</tr>
<tr>
<th>Product</th>
<td>libraries
</td>
</tr>
<tr>
<th>Version</th>
<td>trunk
</td>
</tr>
<tr>
<th>Hardware</th>
<td>PC
</td>
</tr>
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<th>OS</th>
<td>Linux
</td>
</tr>
<tr>
<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Severity</th>
<td>normal
</td>
</tr>
<tr>
<th>Priority</th>
<td>P
</td>
</tr>
<tr>
<th>Component</th>
<td>Scalar Optimizations
</td>
</tr>
<tr>
<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
<tr>
<th>Reporter</th>
<td>momchil.velikov@arm.com
</td>
</tr>
<tr>
<th>CC</th>
<td>llvm-bugs@lists.llvm.org
</td>
</tr></table>
<p>
<div>
<pre>Created <span class=""><a href="attachment.cgi?id=19739" name="attach_19739" title="minimal testcase">attachment 19739</a> <a href="attachment.cgi?id=19739&action=edit" title="minimal testcase">[details]</a></span>
minimal testcase
The attached test program is mis-compiled at all optimisation levels, except
-O0, for X86_64, Arm and likely for all targets.
./bin/clang -target x86_64-linux -O2 union-store.c
$ ./a.out
value = 3, should be 2
This happens in Dead Store Elimination:
*** IR Dump After Value Propagation ***
; Function Attrs: norecurse nounwind
define void @f() local_unnamed_addr #0 {
entry:
store i32 5, i32* getelementptr inbounds (%union.U, %union.U* @a, i32 0, i32
0), align 4, !tbaa !3
%0 = load i16*, i16** bitcast (%union.U** @b to i16**), align 4, !tbaa !6
store i16 3, i16* %0, align 4, !tbaa !3
store i16 2, i16* bitcast (%union.U* @a to i16*), align 4, !tbaa !3
ret void
}
*** IR Dump After Dead Store Elimination ***
; Function Attrs: norecurse nounwind
define void @f() local_unnamed_addr #0 {
entry:
store i32 2, i32* getelementptr inbounds (%union.U, %union.U* @a, i32 0, i32
0), align 4, !tbaa !3
%0 = load i16*, i16** bitcast (%union.U** @b to i16**), align 4, !tbaa !6
store i16 3, i16* %0, align 4, !tbaa !3
ret void
}</pre>
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