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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - Assertion `MI && "No instruction at index"' with unallocatable inline assembly"
href="https://bugs.llvm.org/show_bug.cgi?id=36014">36014</a>
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<th>Summary</th>
<td>Assertion `MI && "No instruction at index"' with unallocatable inline assembly
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<th>Product</th>
<td>new-bugs
</td>
</tr>
<tr>
<th>Version</th>
<td>trunk
</td>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>Linux
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<th>Status</th>
<td>NEW
</td>
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<th>Severity</th>
<td>enhancement
</td>
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<th>Priority</th>
<td>P
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<th>Component</th>
<td>new bugs
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>pablo.barrio@arm.com
</td>
</tr>
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<th>CC</th>
<td>llvm-bugs@lists.llvm.org
</td>
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<pre>Created <span class=""><a href="attachment.cgi?id=19709" name="attach_19709" title="Inline assembly using too many registers">attachment 19709</a> <a href="attachment.cgi?id=19709&action=edit" title="Inline assembly using too many registers">[details]</a></span>
Inline assembly using too many registers
The attached code features some inline assembly code that tries to use more
registers than available. This code tries to use a subset of the GPRs for the
allocation of the first register via constraint 'h' (higher subset of the
GPRs), hitting an assertion in the register allocator:
llvm/lib/CodeGen/SplitKit.cpp:772: llvm::SlotIndex
llvm::SplitEditor::leaveIntvAfter(llvm::SlotIndex): Assertion `MI && "No
instruction at index"' failed.
Using constraint 'r' instead (i.e. general-purpose register) for all the
registers results in the following message shown several times:
error: inline assembly requires more registers than available
which is the correct behaviour.
I was able to track down why allocating to the all-GPRs class gives a
reasonable error message, while high/low GPRs crash the compiler. Function
RAGreedy::tryInstructionSplit() bails out at the beginning if the register
class being used for the allocation is not a "proper subclass":
if (!RegClassInfo.isProperSubClass(CurRC))
return 0;
If I understood correctly, proper subclasses have a parent class with a bigger
number of available allocatable registers. The Arm GPR class is not a proper
subclass, while the "low regs GPR" class is (with GPR being its parent class
with a bigger number of regs). Therefore, GPRs don't hit the bug later in that
function, whereas subclasses do.
The following command can be used to build the example:
clang --target=thumb-arm-none-eabi -march=armv8-m.main -O2 test.c
I have been able to reproduce with Arm, but I believe this bug will affect any
architecture with constraints that select register classes with parent classes.</pre>
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