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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - [AMDGPU][MC] 64-bit image atomics are not supported"
href="https://bugs.llvm.org/show_bug.cgi?id=35998">35998</a>
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<th>Summary</th>
<td>[AMDGPU][MC] 64-bit image atomics are not supported
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<th>Product</th>
<td>libraries
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<th>Version</th>
<td>trunk
</td>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>All
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<th>Status</th>
<td>NEW
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<th>Severity</th>
<td>enhancement
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<th>Priority</th>
<td>P
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<th>Component</th>
<td>Backend: AMDGPU
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>dpreobrazhensky@luxoft.com
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<th>CC</th>
<td>llvm-bugs@lists.llvm.org
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<p>
<div>
<pre>According with AMD documentation,
"Image atomic operations are supported on 32- and 64-bit-per pixel surfaces"
"For atomic operations, DMASK is set to the number of VGPRs (Dwords) to send to
the texture unit. DMASK legal values for atomic image operations:
0x1 = 32-bit atomics except cmpswap.
0x3 = 32-bit atomic cmpswap.
0x3 = 64-bit atomics except cmpswap.
0xf = 64-bit atomic cmpswap."
Currently assembler supports 32-bit atomics only. An example of a failed test:
image_atomic_add v[5:6], v1, s[8:15] dmask:0x3</pre>
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