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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - [AMDGPU][MC] Incorrect parsing of image modifiers"
href="https://bugs.llvm.org/show_bug.cgi?id=35963">35963</a>
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<th>Summary</th>
<td>[AMDGPU][MC] Incorrect parsing of image modifiers
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<th>Product</th>
<td>libraries
</td>
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<th>Version</th>
<td>trunk
</td>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>All
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<th>Status</th>
<td>NEW
</td>
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<th>Severity</th>
<td>enhancement
</td>
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<th>Priority</th>
<td>P
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<th>Component</th>
<td>Backend: AMDGPU
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>dpreobrazhensky@luxoft.com
</td>
</tr>
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<th>CC</th>
<td>llvm-bugs@lists.llvm.org
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<pre>Image modifiers are parsed incorrectly which is clear from the output (VI).
Disassembled code differs from the original. For example, the following
instructions are assembled to the same binary code:
image_atomic_add v5, v1, s[8:15] dmask:0x1
image_atomic_add v5, v1, s[8:15] unorm
image_atomic_add v5, v1, s[8:15] glc
image_atomic_add v5, v1, s[8:15] slc
0x00,0x01,0x48,0xf0,0x01,0x01,0x02,0x00
When disassembled, the code is:
image_atomic_add v5, v1, s[8:15] dmask:0x1</pre>
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