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    <body><table border="1" cellspacing="0" cellpadding="8">
        <tr>
          <th>Bug ID</th>
          <td><a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - TableGen doesn't constrain temporary registers"
   href="https://bugs.llvm.org/show_bug.cgi?id=35965">35965</a>
          </td>
        </tr>

        <tr>
          <th>Summary</th>
          <td>TableGen doesn't constrain temporary registers
          </td>
        </tr>

        <tr>
          <th>Product</th>
          <td>libraries
          </td>
        </tr>

        <tr>
          <th>Version</th>
          <td>trunk
          </td>
        </tr>

        <tr>
          <th>Hardware</th>
          <td>PC
          </td>
        </tr>

        <tr>
          <th>OS</th>
          <td>Linux
          </td>
        </tr>

        <tr>
          <th>Status</th>
          <td>NEW
          </td>
        </tr>

        <tr>
          <th>Severity</th>
          <td>enhancement
          </td>
        </tr>

        <tr>
          <th>Priority</th>
          <td>P
          </td>
        </tr>

        <tr>
          <th>Component</th>
          <td>GlobalISel
          </td>
        </tr>

        <tr>
          <th>Assignee</th>
          <td>unassignedbugs@nondot.org
          </td>
        </tr>

        <tr>
          <th>Reporter</th>
          <td>diana.picus@linaro.org
          </td>
        </tr>

        <tr>
          <th>CC</th>
          <td>llvm-bugs@lists.llvm.org
          </td>
        </tr></table>
      <p>
        <div>
        <pre>Created <span class=""><a href="attachment.cgi?id=19683" name="attach_19683" title="Reproducer: llc -mtriple armv7-gnueabihf -global-isel -debug-only=instruction-select [...]">attachment 19683</a> <a href="attachment.cgi?id=19683&action=edit" title="Reproducer: llc -mtriple armv7-gnueabihf -global-isel -debug-only=instruction-select [...]">[details]</a></span>
Reproducer: llc -mtriple armv7-gnueabihf -global-isel
-debug-only=instruction-select [...]

When trying to select this pattern (ARMInstrVFP.td):
def : VFPNoNEONPat<(i32 (fp_to_sint SPR:$a)),
                   (COPY_TO_REGCLASS (VTOSIZS SPR:$a), GPR)>;

We get:
[...]
Selecting: 
  %1:gprb(s32) = G_FPTOSI %0(s32)
Into:
  %2:_(s32) = VTOSIZS %0(s32), 14, %noreg
  %1:gpr(s32) = COPY %2(s32)
[...]
LLVM ERROR: VReg has no regclass after selection (in function: test_fptosi)

Note: In order to reproduce, you'll have to mark G_FPTOSI as legal in
ARMLegalizerInfo.cpp (since I haven't committed that part yet):
setAction({G_FPTOSI, s32}, Legal);
setAction({G_FPTOSI, 1, s32}, Legal);</pre>
        </div>
      </p>


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