<html>
    <head>
      <base href="https://bugs.llvm.org/">
    </head>
    <body><table border="1" cellspacing="0" cellpadding="8">
        <tr>
          <th>Bug ID</th>
          <td><a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - [X86] Assembler for vcvtsd2sil (%rax), %ebx favors EVEX encoding even though there's nothing requiring EVEX"
   href="https://bugs.llvm.org/show_bug.cgi?id=35837">35837</a>
          </td>
        </tr>

        <tr>
          <th>Summary</th>
          <td>[X86] Assembler for vcvtsd2sil (%rax), %ebx favors EVEX encoding even though there's nothing requiring EVEX
          </td>
        </tr>

        <tr>
          <th>Product</th>
          <td>libraries
          </td>
        </tr>

        <tr>
          <th>Version</th>
          <td>trunk
          </td>
        </tr>

        <tr>
          <th>Hardware</th>
          <td>PC
          </td>
        </tr>

        <tr>
          <th>OS</th>
          <td>Windows NT
          </td>
        </tr>

        <tr>
          <th>Status</th>
          <td>NEW
          </td>
        </tr>

        <tr>
          <th>Severity</th>
          <td>enhancement
          </td>
        </tr>

        <tr>
          <th>Priority</th>
          <td>P
          </td>
        </tr>

        <tr>
          <th>Component</th>
          <td>Backend: X86
          </td>
        </tr>

        <tr>
          <th>Assignee</th>
          <td>unassignedbugs@nondot.org
          </td>
        </tr>

        <tr>
          <th>Reporter</th>
          <td>craig.topper@gmail.com
          </td>
        </tr>

        <tr>
          <th>CC</th>
          <td>llvm-bugs@lists.llvm.org
          </td>
        </tr></table>
      <p>
        <div>
        <pre>The assembler matching table is incorrectly biasing towards EVEX instructions
for any instruction that doesn't use a VR128X/VR256X/FR32X/FR64X register
class.

This is because the HasAVX512 assembler predicate is forcing it to have a
higher priority. Most instructions don't have this issue because
VR128/VR256/FR32/FR64 register classes are given priority over their X
counterparts regardless of assembler predicate.

Currently unsure how to fix this short of marking all the ambiguous
instructions "CodeGenOnly = 1, ForceDisassemble = 1". This will hide them from
the asm matcher table.</pre>
        </div>
      </p>


      <hr>
      <span>You are receiving this mail because:</span>

      <ul>
          <li>You are on the CC list for the bug.</li>
      </ul>
    </body>
</html>