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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - [X86] Assembler for vcvtsd2sil (%rax), %ebx favors EVEX encoding even though there's nothing requiring EVEX"
href="https://bugs.llvm.org/show_bug.cgi?id=35837">35837</a>
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<th>Summary</th>
<td>[X86] Assembler for vcvtsd2sil (%rax), %ebx favors EVEX encoding even though there's nothing requiring EVEX
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<th>Product</th>
<td>libraries
</td>
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<th>Version</th>
<td>trunk
</td>
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<th>Hardware</th>
<td>PC
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<th>OS</th>
<td>Windows NT
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<th>Status</th>
<td>NEW
</td>
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<th>Severity</th>
<td>enhancement
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<th>Priority</th>
<td>P
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<th>Component</th>
<td>Backend: X86
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>craig.topper@gmail.com
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<th>CC</th>
<td>llvm-bugs@lists.llvm.org
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<p>
<div>
<pre>The assembler matching table is incorrectly biasing towards EVEX instructions
for any instruction that doesn't use a VR128X/VR256X/FR32X/FR64X register
class.
This is because the HasAVX512 assembler predicate is forcing it to have a
higher priority. Most instructions don't have this issue because
VR128/VR256/FR32/FR64 register classes are given priority over their X
counterparts regardless of assembler predicate.
Currently unsure how to fix this short of marking all the ambiguous
instructions "CodeGenOnly = 1, ForceDisassemble = 1". This will hide them from
the asm matcher table.</pre>
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