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<base href="https://bugs.llvm.org/">
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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - [Reg-alloc] Bad machine code: Live segment doesn't end at a valid instruction"
href="https://bugs.llvm.org/show_bug.cgi?id=35574">35574</a>
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<th>Summary</th>
<td>[Reg-alloc] Bad machine code: Live segment doesn't end at a valid instruction
</td>
</tr>
<tr>
<th>Product</th>
<td>libraries
</td>
</tr>
<tr>
<th>Version</th>
<td>trunk
</td>
</tr>
<tr>
<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>Linux
</td>
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<th>Status</th>
<td>NEW
</td>
</tr>
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<th>Severity</th>
<td>enhancement
</td>
</tr>
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<th>Priority</th>
<td>P
</td>
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<th>Component</th>
<td>Register Allocator
</td>
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<tr>
<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
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<th>Reporter</th>
<td>paulsson@linux.vnet.ibm.com
</td>
</tr>
<tr>
<th>CC</th>
<td>llvm-bugs@lists.llvm.org
</td>
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<pre>Created <span class=""><a href="attachment.cgi?id=19529" name="attach_19529" title="reduced testcase">attachment 19529</a> <a href="attachment.cgi?id=19529&action=edit" title="reduced testcase">[details]</a></span>
reduced testcase
Machine verifier complains after coalescing. Small reduced program attached.
bin/llc -mtriple=s390x-linux-gnu -mcpu=z13 tc_liveseg.ll -disable-machine-dce
-verify-machineinstrs
# After Simple Register Coalescing
********** INTERVALS **********
%0 [336r,336d:0) 0@336r
%1 [192r,240d:0) 0@192r
%3 [96r,128r:0) 0@96r
%5 [128r,192r:0) 0@128r
%13 [16r,32r:0) 0@16r
RegMasks:
********** MACHINEINSTRS **********
# Machine code for function main: NoPHIs, TracksLiveness
0B %bb.0: derived from LLVM BB %0
16B %13:grx32bit = LHIMux 0; GRX32Bit:%13
32B CHIMux %13, 0, implicit-def %cc; GRX32Bit:%13
48B BRC 14, 6, %bb.2, implicit killed %cc
64B J %bb.1
Successors according to CFG: %bb.1(0x00000001 / 0x80000000 = 0.00%)
%bb.2(0x7fffffff / 0x80000000 = 100.00%)
80B %bb.1: derived from LLVM BB %3
Predecessors according to CFG: %bb.0
96B %3:addr64bit = LARL <ga:@g_979>; ADDR64Bit:%3
128B %5:gr64bit = LG %3, 3, %noreg; mem:LD8[bitcast (i8*
getelementptr inbounds ({ i8, i8, i8, { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8,
i8, i8, i8, i8, i8, i8, i8 } }, { i8, i8, i8, { i8, i8, i8, i8, i8, i8, i8, i8,
i8, i8, i8, i8, i8, i8, i8, i8, i8 } }* @g_979, i64 0, i32 3, i32 0) to
i136*)](align=1)(dereferenceable) GR64Bit:%5 ADDR64Bit:%3
192B %1:gr64bit = SRLG %5, %noreg, 24; GR64Bit:%1,%5
336B dead %0:gr64bit = LGHI 0; GR64Bit:%0
352B %bb.2: derived from LLVM BB %4
Predecessors according to CFG: %bb.0
368B Return
# End machine code for function main.
*** Bad machine code: Live segment doesn't end at a valid instruction ***
- function: main
- basic block: %bb.1 (0x2aa564e5ea8) [80B;352B)
- liverange: [192r,240d:0) 0@192r
- v. register: %1
- segment: [192r,240d:0)
LLVM ERROR: Found 1 machine code errors.</pre>
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