<html>
<head>
<base href="https://bugs.llvm.org/">
</head>
<body><table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - Merge r317204+r318172 into the 5.0.1 branch : Enable register scavenging for MSA + simplify test for 5.0.1"
href="https://bugs.llvm.org/show_bug.cgi?id=35308">35308</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>Merge r317204+r318172 into the 5.0.1 branch : Enable register scavenging for MSA + simplify test for 5.0.1
</td>
</tr>
<tr>
<th>Product</th>
<td>new-bugs
</td>
</tr>
<tr>
<th>Version</th>
<td>5.0
</td>
</tr>
<tr>
<th>Hardware</th>
<td>PC
</td>
</tr>
<tr>
<th>OS</th>
<td>All
</td>
</tr>
<tr>
<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Severity</th>
<td>enhancement
</td>
</tr>
<tr>
<th>Priority</th>
<td>P
</td>
</tr>
<tr>
<th>Component</th>
<td>new bugs
</td>
</tr>
<tr>
<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
<tr>
<th>Reporter</th>
<td>simon.dardis@mips.com
</td>
</tr>
<tr>
<th>CC</th>
<td>llvm-bugs@lists.llvm.org
</td>
</tr></table>
<p>
<div>
<pre>The first patch tweaks the logic determining size of the stack that is likely
to be accessed for MIPS when using MSA and when to enable an emergency spill
slot, the second simplifies the test for the 5.0.1 release.
Fixes an ICE when compiling the LLVM testsuite with MSA and mips64r6.</pre>
</div>
</p>
<hr>
<span>You are receiving this mail because:</span>
<ul>
<li>You are on the CC list for the bug.</li>
</ul>
</body>
</html>