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      <base href="https://bugs.llvm.org/">
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    <body><table border="1" cellspacing="0" cellpadding="8">
        <tr>
          <th>Bug ID</th>
          <td><a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - [CUDA][NVPTX] Incorrect compilation of __activemask()"
   href="https://bugs.llvm.org/show_bug.cgi?id=35249">35249</a>
          </td>
        </tr>

        <tr>
          <th>Summary</th>
          <td>[CUDA][NVPTX] Incorrect compilation of __activemask()
          </td>
        </tr>

        <tr>
          <th>Product</th>
          <td>new-bugs
          </td>
        </tr>

        <tr>
          <th>Version</th>
          <td>trunk
          </td>
        </tr>

        <tr>
          <th>Hardware</th>
          <td>PC
          </td>
        </tr>

        <tr>
          <th>OS</th>
          <td>All
          </td>
        </tr>

        <tr>
          <th>Status</th>
          <td>NEW
          </td>
        </tr>

        <tr>
          <th>Severity</th>
          <td>enhancement
          </td>
        </tr>

        <tr>
          <th>Priority</th>
          <td>P
          </td>
        </tr>

        <tr>
          <th>Component</th>
          <td>new bugs
          </td>
        </tr>

        <tr>
          <th>Assignee</th>
          <td>unassignedbugs@nondot.org
          </td>
        </tr>

        <tr>
          <th>Reporter</th>
          <td>acjacob@us.ibm.com
          </td>
        </tr>

        <tr>
          <th>CC</th>
          <td>llvm-bugs@lists.llvm.org
          </td>
        </tr></table>
      <p>
        <div>
        <pre>Hi,

Compiling and running the following CUDA program with Clang/LLVM versus NVCC
produces different results on a Volta GPU with CUDA-9.0.  I believe there may
be a bug in LLVM.

__global__ void kernel() {
  printf ("Activemask %x\n", __activemask());

  if (threadIdx.x % 2 == 0)
    printf ("Activemask %x\n", __activemask());
}

__activemask() returns a bitmask specifying the number of lanes in a warp that
execute the instruction synchronously.  If I launch the kernel with 1
threadblock and 32 threads I expect the first printf to show all 32 lanes
active and the second to show only the even ones as active.

I get the following output when compiled with NVCC:

Activemask ffffffff
<<32 times>>
Activemask 55555555
<<16 times>>

When compiled with Clang/LLVM I get the following output:

Activemask ffffffff
<<48 times>>


__activemask() gets resolved to the LLVM intrinsic llvm.nvvm.vote.ballot(i1
true).  I get the incorrect IR after 'Early CSE'.  I can prevent the
optimization by marking the intrinsic as having a side-effect
(IntrHasSideEffects and removing IntrNoMem) in
include/llvm/IR/IntrinsicsNVVM.td.  Is this the appropriate property?  It
probably needs to be done for all vote intrinsics, at least for Volta.

Thanks.</pre>
        </div>
      </p>


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