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    <head>
      <base href="https://bugs.llvm.org/">
    </head>
    <body><table border="1" cellspacing="0" cellpadding="8">
        <tr>
          <th>Bug ID</th>
          <td><a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - [inline asm] Add -print-schedule scheduling comments to inline asm"
   href="https://bugs.llvm.org/show_bug.cgi?id=35162">35162</a>
          </td>
        </tr>

        <tr>
          <th>Summary</th>
          <td>[inline asm] Add -print-schedule scheduling comments to inline asm
          </td>
        </tr>

        <tr>
          <th>Product</th>
          <td>new-bugs
          </td>
        </tr>

        <tr>
          <th>Version</th>
          <td>unspecified
          </td>
        </tr>

        <tr>
          <th>Hardware</th>
          <td>PC
          </td>
        </tr>

        <tr>
          <th>OS</th>
          <td>Windows NT
          </td>
        </tr>

        <tr>
          <th>Status</th>
          <td>NEW
          </td>
        </tr>

        <tr>
          <th>Severity</th>
          <td>enhancement
          </td>
        </tr>

        <tr>
          <th>Priority</th>
          <td>P
          </td>
        </tr>

        <tr>
          <th>Component</th>
          <td>new bugs
          </td>
        </tr>

        <tr>
          <th>Assignee</th>
          <td>unassignedbugs@nondot.org
          </td>
        </tr>

        <tr>
          <th>Reporter</th>
          <td>llvm-dev@redking.me.uk
          </td>
        </tr>

        <tr>
          <th>CC</th>
          <td>andrew.v.tischenko@gmail.com, craig.topper@gmail.com, gadi.haber@intel.com, llvm-bugs@lists.llvm.org, spatel+llvm@rotateright.com, zvi.rackover@intel.com
          </td>
        </tr></table>
      <p>
        <div>
        <pre>As part of increasing scheduler model test coverage it would be very useful to
be get scheduling comments on ir instructions from inline asm:

define i64 @test_bsr64(i64 %a0, i64 *%a1) nounwind {
  %1 = tail call i64 asm "bsr $1, $0", "=r,r"(i64 %a0) nounwind
  %2 = tail call i64 asm "bsr $1, $0", "=r,*m"(i64 *%a1) nounwind
  %3 = or i64 %1, %2
  ret i64 %3
}

define i64 @test_bswap64(i64 %a0) nounwind {
  %1 = tail call i64 asm "bswap $0", "=r,0"(i64 %a0) nounwind
  ret i64 %1
}

Interestingly the bswap case succeeds but the bsr cases fail:


llc -mtriple=x86_64-unknown -mcpu=btver2 -print-schedule

test_bsr64:                             # @test_bsr64
# BB#0:
        #APP
        bsrq    (%rsi), %rax
        #NO_APP
        #APP
        bsrq    %rdi, %rcx
        #NO_APP
        orq     %rcx, %rax              #  sched: [1:0.50]
        retq                            #  sched: [4:1.00]

test_bswap64:                           # @test_bswap64
# BB#0:
        bswapq  %rdi                    #  sched: [1:0.50]
        movq    %rdi, %rax              #  sched: [1:0.17]
        retq                            #  sched: [4:1.00]</pre>
        </div>
      </p>


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