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<base href="https://bugs.llvm.org/">
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<body><table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - Wrong order of operations after X86DAG->DAG"
href="https://bugs.llvm.org/show_bug.cgi?id=34735">34735</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>Wrong order of operations after X86DAG->DAG
</td>
</tr>
<tr>
<th>Product</th>
<td>new-bugs
</td>
</tr>
<tr>
<th>Version</th>
<td>trunk
</td>
</tr>
<tr>
<th>Hardware</th>
<td>PC
</td>
</tr>
<tr>
<th>OS</th>
<td>All
</td>
</tr>
<tr>
<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Severity</th>
<td>enhancement
</td>
</tr>
<tr>
<th>Priority</th>
<td>P
</td>
</tr>
<tr>
<th>Component</th>
<td>new bugs
</td>
</tr>
<tr>
<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
<tr>
<th>Reporter</th>
<td>ilia.taraban@intel.com
</td>
</tr>
<tr>
<th>CC</th>
<td>llvm-bugs@lists.llvm.org
</td>
</tr></table>
<p>
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<pre>This test fails at with wrong answer after CodeGen Prepare and X86 DAG->DAG
Instruction Selection, Local Dynamic TLS Access Clean-up on O3:
================= nice.c ==============
int main ()
{
unsigned int i = 0, j = 0;
unsigned int l [100] = {0}, a [55] [100] = {0};
for (i = 1; i < 55; i += 2)
{
l[i] = 0;
for (j = 17; j > 1; --j)
{
a[i][j] = (43 + (l[j]));
l[j] += 94;
}
}
printf("res = %u\n", a[1][17]);
return 0;
}
=======================================
<span class="quote">>>> clang -v</span >
clang version 6.0.0 (trunk 314206)
Target: x86_64-unknown-linux-gnu
Thread model: posix
...
<span class="quote">>>> clang -O2 -o nice.exe nice.c
>>> ./nice.exe</span >
res = 43
<span class="quote">>>> clang -O3 -o nice.exe nice.c
>>> ./nice.exe</span >
res = 137
<span class="quote">>>> clang -O3 -o nice.exe nice.c -mllvm -opt-bisect-limit=103 && ./nice.exe</span >
...
BISECT: running pass (102) Partially inline calls to library functions on
function (main)
BISECT: running pass (103) Scalarize Masked Memory Intrinsics on function
(main)
BISECT: NOT running pass (104) CodeGen Prepare on function (main)
BISECT: NOT running pass (105) X86 DAG->DAG Instruction Selection on function
(main)
...
res = 43
<span class="quote">>>> clang -O3 -o nice.exe nice.c -mllvm -opt-bisect-limit=104 && ./nice.exe</span >
...
BISECT: running pass (103) Scalarize Masked Memory Intrinsics on function
(main)
BISECT: running pass (104) CodeGen Prepare on function (main)
BISECT: NOT running pass (105) X86 DAG->DAG Instruction Selection on function
(main)
BISECT: NOT running pass (106) Local Dynamic TLS Access Clean-up on function
(main)
...
res = 137
If we look at IR before and after "X86 DAG->DAG Instruction Selection on
function" + "Local Dynamic TLS Access Clean-up", we'll see that there wrong
value is put into 17 element of array:
BEFORE:
%14 = getelementptr i8, i8* %13, i64 68
%15 = bitcast i8* %14 to i32*
%16 = load i32, i32* %15, align 4, !tbaa !2; %16 = L[17]
%17 = add i32 %16, 94
store i32 %17, i32* %15, align 4, !tbaa !2; L[17] += 94
%18 = bitcast [100 x i32]* %1 to i8*
%19 = getelementptr i8, i8* %18, i64 64
%20 = bitcast i8* %19 to i32*
%21 = load i32, i32* %20, align 16, !tbaa !2
%22 = add i32 %21, 94
store i32 %22, i32* %20, align 16, !tbaa !2
%23 = bitcast [100 x i32]* %1 to i8*
%24 = getelementptr i8, i8* %23, i64 60
%25 = bitcast i8* %24 to i32*
%26 = load i32, i32* %25, align 4, !tbaa !2
%27 = add i32 %26, 94
store i32 %27, i32* %25, align 4, !tbaa !2
%28 = bitcast [100 x i32]* %1 to i8*
%29 = getelementptr i8, i8* %28, i64 44
%30 = bitcast i8* %29 to <4 x i32>*
%31 = load <4 x i32>, <4 x i32>* %30, align 4, !tbaa !2
%32 = extractelement <4 x i32> %31, i32 3
%33 = insertelement <4 x i32> undef, i32 %32, i32 0
%34 = insertelement <4 x i32> %33, i32 %26, i32 1
%35 = insertelement <4 x i32> %34, i32 %21, i32 2
%36 = insertelement <4 x i32> %35, i32 %16, i32 3; HERE WE USE OLD L[17]
AFTER:
%vreg30<def> = MOV32rm <fi#0>, 1, %noreg, 68, %noreg;
mem:LD4[%15](tbaa=!3)(dereferenceable) GR32:%vreg30
%vreg31<def,tied1> = ADD32ri8 %vreg30<tied0>, 94,
%EFLAGS<imp-def,dead>; GR32:%vreg31,%vreg30
MOV32mr <fi#0>, 1, %noreg, 68, %noreg, %vreg31<kill>;
mem:ST4[%15](tbaa=!3) GR32:%vreg31
%vreg32<def> = MOV32rm <fi#0>, 1, %noreg, 64, %noreg;
mem:LD4[%20](align=16)(tbaa=!3)(dereferenceable) GR32:%vreg32
%vreg33<def,tied1> = ADD32ri8 %vreg32<tied0>, 94,
%EFLAGS<imp-def,dead>; GR32:%vreg33,%vreg32
%vreg34<def> = MOVQI2PQIrm <fi#0>, 1, %noreg, 64, %noreg;
mem:LD8[%20](align=16) VR128:%vreg34
; USING MODIFIED L[17]
AND IN RESULT ASM:
movl $0, (%rsp,%rcx,4)
addl $94, 68(%rsp) # L[17] += 94
movq 64(%rsp), %xmm3 # xmm3 = L[16], L[17]
addl $94, 64(%rsp) # L[16] += 94
So after Codegen and x86DAG->DAG operations now stay in wrong order.</pre>
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