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<base href="https://bugs.llvm.org/">
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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - redundant pand after vector shift of a byte vector (psrlw)"
href="https://bugs.llvm.org/show_bug.cgi?id=34620">34620</a>
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<th>Summary</th>
<td>redundant pand after vector shift of a byte vector (psrlw)
</td>
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<th>Product</th>
<td>libraries
</td>
</tr>
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<th>Version</th>
<td>4.0
</td>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>Linux
</td>
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<th>Status</th>
<td>NEW
</td>
</tr>
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<th>Severity</th>
<td>enhancement
</td>
</tr>
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<th>Priority</th>
<td>P
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<th>Component</th>
<td>Backend: X86
</td>
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
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<th>Reporter</th>
<td>llvm@henning-thielemann.de
</td>
</tr>
<tr>
<th>CC</th>
<td>llvm-bugs@lists.llvm.org
</td>
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<p>
<div>
<pre>I have a vector of bytes and want to increment the vector elements according to
certain bits of another vector like so:
define <16 x i8> @add_bitset_to_vector(<16 x i8>, <16 x i8>) {
_L1:
%v0 = lshr <16 x i8> %0, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8
1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
%v1 = and <16 x i8> %v0, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8
1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
%v2 = add <16 x i8> %v1, %1
ret <16 x i8> %v2
}
On X86-64 llc emits:
.section .rodata.cst16,"aM",@progbits,16
.p2align 4
.LCPI2_0:
.zero 16,127
.LCPI2_1:
.zero 16,1
.text
.globl add_bitset_to_vector
.p2align 4, 0x90
.type add_bitset_to_vector,@function
add_bitset_to_vector: # @add_bitset_to_vector
# BB#0: # %_L1
psrlw $1, %xmm0
pand .LCPI2_0(%rip), %xmm0
pand .LCPI2_1(%rip), %xmm0
paddb %xmm1, %xmm0
retq
.Lfunc_end2:
.size add_bitset_to_vector, .Lfunc_end2-add_bitset_to_vector
That is, the X86 backend uses word vector shift (psrlw) plus pand in order to
perform the byte vector shift. However, my pand for masking the least
significant bits makes the pand generated by lshr redundant.</pre>
</div>
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