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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - MOV16ms uses operand size override prefix"
href="https://bugs.llvm.org/show_bug.cgi?id=34478">34478</a>
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<th>Summary</th>
<td>MOV16ms uses operand size override prefix
</td>
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<th>Product</th>
<td>libraries
</td>
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<th>Version</th>
<td>4.0
</td>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>Linux
</td>
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<th>Status</th>
<td>NEW
</td>
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<th>Severity</th>
<td>enhancement
</td>
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<th>Priority</th>
<td>P
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<th>Component</th>
<td>Backend: X86
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>kadircetinkaya.06.tr@gmail.com
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</tr>
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<th>CC</th>
<td>llvm-bugs@lists.llvm.org
</td>
</tr></table>
<p>
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<pre>When assembling an instruction like
movw %fs, (%rsi)
LLVM encodes with:
66 8c 26 mov %fs,(%rsi)
which adds operand size override prefix whereas gcc doesn't append 66 and
encodes the instruction as:
8c 26 mov %fs,(%rsi)
Intel defines the behavior of the instruction on page 694 of Instruction Set
Reference, July 2017 and it doesn't provide detailed information for that case,
but I feel like using only the least 16 bits of an address might cause problems
in 64 bit mode.
Do we know if it is a bug or X86InstrSystem.td contains OpSize16 for MOV16ms on
a specific purpose?</pre>
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