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<base href="https://bugs.llvm.org/">
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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - [X86] Very bad sequences generated for building smaller vectors from bigger ones"
href="https://bugs.llvm.org/show_bug.cgi?id=34380">34380</a>
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<th>Summary</th>
<td>[X86] Very bad sequences generated for building smaller vectors from bigger ones
</td>
</tr>
<tr>
<th>Product</th>
<td>libraries
</td>
</tr>
<tr>
<th>Version</th>
<td>trunk
</td>
</tr>
<tr>
<th>Hardware</th>
<td>All
</td>
</tr>
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<th>OS</th>
<td>All
</td>
</tr>
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<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Severity</th>
<td>enhancement
</td>
</tr>
<tr>
<th>Priority</th>
<td>P
</td>
</tr>
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<th>Component</th>
<td>Backend: X86
</td>
</tr>
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
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<th>Reporter</th>
<td>ayman.musa@intel.com
</td>
</tr>
<tr>
<th>CC</th>
<td>llvm-bugs@lists.llvm.org
</td>
</tr></table>
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<pre>IR that build a new vector with elements from a bigger sized vector gets
lowered to a very bad X86 instruction sequence.
Some example:
define <8 x i16> @test1(<16 x i16> %vec) {
%res = shufflevector <16 x i16> %vec, <16 x i16> undef, <8 x i32> <i32 14,
i32 8, i32 4, i32 12, i32 9, i32 4, i32 14, i32 15>
ret <8 x i16> %res
}
LLVM emits:
vextracti128 $1, %ymm0, %xmm1
vpshufb .LCPI0_0(%rip), %xmm1, %xmm1 # xmm1 =
xmm1[12,13,0,1,8,9,8,9,2,3,2,3,12,13,14,15]
vpshufhw $0, %xmm0, %xmm0 # xmm0 = xmm0[0,1,2,3,4,4,4,4]
vpshufd $250, %xmm0, %xmm0 # xmm0 = xmm0[2,2,3,3]
vpblendw $36, %xmm0, %xmm1, %xmm0 # xmm0 =
xmm1[0,1],xmm0[2],xmm1[3,4],xmm0[5],xmm1[6,7]
vzeroupper
While it can be replaced with (perm_idxs holds the indexes
[14,8,4,12,9,4,14,1]):
vbroadcasti128 perm_idxs(%rip), %ymm1 # ymm1 = mem[0,1,0,1]
vpermw %ymm0, %ymm1, %ymm0
vzeroupper
============================================================================
define <4 x i32> @test_16xi32_to_4xi32_perm_mask9(<16 x i32> %vec) {
; CHECK-LABEL: test_16xi32_to_4xi32_perm_mask9
; CHECK: # BB#0:
; CHECK-NEXT: vmov{{.*}} .LCPI{{.*}}(%rip), %zmm{{0|1|2}}
; CHECK-NEXT: vpermd %zmm0, %zmm1, %zmm0
; CHECK-NEXT: retq
%res = shufflevector <16 x i32> %vec, <16 x i32> undef, <4 x i32> <i32 12,
i32 9, i32 4, i32 10>
ret <4 x i32> %res
}
LLVM emits:
vextracti64x4 $1, %zmm0, %ymm1
vmovdqa .LCPI237_0(%rip), %ymm2 # ymm2 = <4,1,u,2,u,u,u,u>
vpermd %ymm1, %ymm2, %ymm1
vpermq $232, %ymm0, %ymm0 # ymm0 = ymm0[0,2,2,3]
vpblendd $4, %xmm0, %xmm1, %xmm0 # xmm0 = xmm1[0,1],xmm0[2],xmm1[3]
vzeroupper
While it can be replaced with (perm_idxs holds the indexes [12,9,4,10]):
vbroadcasti128 perm_idxs(%rip), %zmm1 # zmm1 = mem[0,1,0,1,0,1,0,1]
vpermd %zmm0, %zmm1, %zmm0
vzeroupper</pre>
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