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<base href="https://bugs.llvm.org/">
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<body><table border="1" cellspacing="0" cellpadding="8">
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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - Wrong code generation on arm/thumb2"
href="https://bugs.llvm.org/show_bug.cgi?id=34165">34165</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>Wrong code generation on arm/thumb2
</td>
</tr>
<tr>
<th>Product</th>
<td>clang
</td>
</tr>
<tr>
<th>Version</th>
<td>5.0
</td>
</tr>
<tr>
<th>Hardware</th>
<td>PC
</td>
</tr>
<tr>
<th>OS</th>
<td>Linux
</td>
</tr>
<tr>
<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Severity</th>
<td>normal
</td>
</tr>
<tr>
<th>Priority</th>
<td>P
</td>
</tr>
<tr>
<th>Component</th>
<td>LLVM Codegen
</td>
</tr>
<tr>
<th>Assignee</th>
<td>unassignedclangbugs@nondot.org
</td>
</tr>
<tr>
<th>Reporter</th>
<td>raj.khem@gmail.com
</td>
</tr>
<tr>
<th>CC</th>
<td>llvm-bugs@lists.llvm.org
</td>
</tr></table>
<p>
<div>
<pre>Created <span class=""><a href="attachment.cgi?id=18969" name="attach_18969" title="test case">attachment 18969</a> <a href="attachment.cgi?id=18969&action=edit" title="test case">[details]</a></span>
test case
While compiling musl C library with clang 5.0 rc2, it does not boot and end up
in segfaults, same setup works fine with gcc. Digging further it seems that
code generated for ioctl() function is loading stack relative values using
clobbered r7 register
arm-bec-linux-musleabi-clang -march=armv7ve -mthumb -mfpu=neon-vfpv4
-mfloat-abi=hard -mcpu=cortex-a7 -fstack-protector-strong -O2 -c test.c -o
test.o.clang
disassmbly looks like below. See the ldr before svc instruction and movs
intruction prior to that which loads a contant into r7
test.o.clang: file format elf32-littlearm
Disassembly of section .text:
00000000 <ioctl>:
0: b082 sub sp, #8
2: b5c0 push {r6, r7, lr}
4: af01 add r7, sp, #4
6: b083 sub sp, #12
8: f8df c040 ldr.w ip, [pc, #64] ; 4c <ioctl+0x4c>
c: 60fb str r3, [r7, #12]
e: 44fc add ip, pc
10: f8dc c000 ldr.w ip, [ip]
14: f8dc 3000 ldr.w r3, [ip]
18: 60ba str r2, [r7, #8]
1a: f107 0208 add.w r2, r7, #8
1e: 9302 str r3, [sp, #8]
20: f042 0204 orr.w r2, r2, #4
24: 9201 str r2, [sp, #4]
26: 2736 movs r7, #54 ; 0x36
28: 68ba ldr r2, [r7, #8]
2a: df00 svc 0
2c: f7ff fffe bl 0 <__syscall_ret>
30: 4907 ldr r1, [pc, #28] ; (50 <ioctl+0x50>)
32: 9a02 ldr r2, [sp, #8]
34: 4479 add r1, pc
36: 6809 ldr r1, [r1, #0]
38: 6809 ldr r1, [r1, #0]
3a: 1a89 subs r1, r1, r2
3c: bf01 itttt eq
3e: b003 addeq sp, #12
40: e8bd 40c0 ldmiaeq.w sp!, {r6, r7, lr}
44: b002 addeq sp, #8
46: 4770 bxeq lr
48: f7ff fffe bl 0 <__stack_chk_fail>
4c: 0000003a .word 0x0000003a
50: 00000018 .word 0x00000018
here is disassembly from gcc 7.1
test.o: file format elf32-littlearm
Disassembly of section .text.ioctl:
00000000 <ioctl>:
0: b40e push {r1, r2, r3}
2: b5b0 push {r4, r5, r7, lr}
4: f240 0400 movw r4, #0
8: f2c0 0400 movt r4, #0
c: b083 sub sp, #12
e: ab07 add r3, sp, #28
10: 2736 movs r7, #54 ; 0x36
12: 6825 ldr r5, [r4, #0]
14: f853 1b04 ldr.w r1, [r3], #4
18: 9a08 ldr r2, [sp, #32]
1a: 9501 str r5, [sp, #4]
1c: 9300 str r3, [sp, #0]
1e: df00 svc 0
20: f7ff fffe bl 0 <__syscall_ret>
24: 9a01 ldr r2, [sp, #4]
26: 6823 ldr r3, [r4, #0]
28: 429a cmp r2, r3
2a: d104 bne.n 36 <ioctl+0x36>
2c: b003 add sp, #12
2e: e8bd 40b0 ldmia.w sp!, {r4, r5, r7, lr}
32: b003 add sp, #12
34: 4770 bx lr
36: f7ff fffe bl 0 <__stack_chk_fail>
3a: bf00 nop</pre>
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