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      <base href="https://bugs.llvm.org/">
    </head>
    <body><table border="1" cellspacing="0" cellpadding="8">
        <tr>
          <th>Bug ID</th>
          <td><a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - RegCoalescer introduces "Virtual register defs don't dominate all uses" error"
   href="https://bugs.llvm.org/show_bug.cgi?id=33597">33597</a>
          </td>
        </tr>

        <tr>
          <th>Summary</th>
          <td>RegCoalescer introduces "Virtual register defs don't dominate all uses" error
          </td>
        </tr>

        <tr>
          <th>Product</th>
          <td>libraries
          </td>
        </tr>

        <tr>
          <th>Version</th>
          <td>trunk
          </td>
        </tr>

        <tr>
          <th>Hardware</th>
          <td>PC
          </td>
        </tr>

        <tr>
          <th>OS</th>
          <td>All
          </td>
        </tr>

        <tr>
          <th>Status</th>
          <td>NEW
          </td>
        </tr>

        <tr>
          <th>Severity</th>
          <td>enhancement
          </td>
        </tr>

        <tr>
          <th>Priority</th>
          <td>P
          </td>
        </tr>

        <tr>
          <th>Component</th>
          <td>Register Allocator
          </td>
        </tr>

        <tr>
          <th>Assignee</th>
          <td>unassignedbugs@nondot.org
          </td>
        </tr>

        <tr>
          <th>Reporter</th>
          <td>Matthew.Arsenault@amd.com
          </td>
        </tr>

        <tr>
          <th>CC</th>
          <td>llvm-bugs@lists.llvm.org
          </td>
        </tr></table>
      <p>
        <div>
        <pre>Created <span class=""><a href="attachment.cgi?id=18715" name="attach_18715" title="Testcase">attachment 18715</a> <a href="attachment.cgi?id=18715&action=edit" title="Testcase">[details]</a></span>
Testcase

Renaming independent subregister live ranges in vreg_does_not_dominate
%vreg19: Found 4 equivalence classes.
%vreg19: Splitting into newly created: %vreg20 %vreg21 %vreg22

# Machine code for function vreg_does_not_dominate: NoPHIs, TracksLiveness
Function Live Ins: %VGPR0 in %vreg2, %SGPR30_SGPR31 in %vreg15

BB#0: 
    Live Ins: %VGPR0 %SGPR30_SGPR31 %SGPR5
        %vreg15<def> = COPY %SGPR30_SGPR31; SReg_64:%vreg15
        %vreg2<def> = COPY %VGPR0; VGPR_32:%vreg2
        %vreg20:sub1<def,read-undef,tied3> = V_MAC_F32_e32 %vreg7<undef>,
%vreg6<undef>, %vreg20:sub1<undef,tied0>, %EXEC<imp-use>; VReg_128:%vreg20
VGPR_32:%vreg7,%vreg6
        %vreg21:sub0<def> = V_MOV_B32_e32 0, %EXEC<imp-use>; VReg_128:%vreg21
        %vreg19:sub2<def,read-undef> = COPY %vreg19:sub0; VReg_128:%vreg19
        S_CBRANCH_VCCNZ <BB#2>, %VCC<imp-use,undef>
        S_BRANCH <BB#1>
    Successors according to CFG: BB#2(0x40000000 / 0x80000000 = 50.00%)
BB#1(0x40000000 / 0x80000000 = 50.00%)

BB#1: 
    Predecessors according to CFG: BB#0
        %vreg22:sub3<def> = V_ADD_F32_e32 %vreg9<undef>, %vreg9<undef>,
%EXEC<imp-use>; VReg_128:%vreg22 VGPR_32:%vreg9
        %vreg21:sub0<def> = V_ADD_F32_e64 0, 0, 0, 0, 0, 0, %EXEC<imp-use>;
VReg_128:%vreg21
        %vreg20:sub1<def> = V_ADD_F32_e32 %vreg19:sub1, %vreg19:sub1,
%EXEC<imp-use>; VReg_128:%vreg20,%vreg19,%vreg19
        %vreg19:sub2<def,read-undef> = COPY %vreg19:sub0; VReg_128:%vreg19
    Successors according to CFG: BB#2(0x80000000 / 0x80000000 = 100.00%)

BB#2: 
    Predecessors according to CFG: BB#0 BB#1
        BUFFER_STORE_DWORD_OFFEN %vreg19:sub3, %vreg2,
%SGPR0_SGPR1_SGPR2_SGPR3, %SGPR4, 12, 0, 0, 0, %EXEC<imp-use>; VReg_128:%vreg19
VGPR_32:%vreg2
        BUFFER_STORE_DWORD_OFFEN %vreg19:sub2, %vreg2,
%SGPR0_SGPR1_SGPR2_SGPR3, %SGPR4, 8, 0, 0, 0, %EXEC<imp-use>; VReg_128:%vreg19
VGPR_32:%vreg2
        BUFFER_STORE_DWORD_OFFEN %vreg19:sub1, %vreg2,
%SGPR0_SGPR1_SGPR2_SGPR3, %SGPR4, 4, 0, 0, 0, %EXEC<imp-use>; VReg_128:%vreg19
VGPR_32:%vreg2
        BUFFER_STORE_DWORD_OFFEN %vreg19:sub0, %vreg2,
%SGPR0_SGPR1_SGPR2_SGPR3, %SGPR4, 0, 0, 0, 0, %EXEC<imp-use>; VReg_128:%vreg19
VGPR_32:%vreg2
        %SGPR30_SGPR31<def> = COPY %vreg15; SReg_64:%vreg15
        %SGPR5<def> = COPY %SGPR5
        S_SETPC_B64_return %SGPR30_SGPR31, %SGPR5<imp-use>

# End machine code for function vreg_does_not_dominate.

*** Bad machine code: Virtual register defs don't dominate all uses. ***
- function:    vreg_does_not_dominate
- v. register: %vreg22
LLVM ERROR: Found 1 machine code errors.</pre>
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