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<base href="https://bugs.llvm.org/">
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<body><table border="1" cellspacing="0" cellpadding="8">
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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - Bad machine code: Using an undefined physical register"
href="https://bugs.llvm.org/show_bug.cgi?id=33468">33468</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>Bad machine code: Using an undefined physical register
</td>
</tr>
<tr>
<th>Product</th>
<td>libraries
</td>
</tr>
<tr>
<th>Version</th>
<td>trunk
</td>
</tr>
<tr>
<th>Hardware</th>
<td>PC
</td>
</tr>
<tr>
<th>OS</th>
<td>Windows NT
</td>
</tr>
<tr>
<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Severity</th>
<td>enhancement
</td>
</tr>
<tr>
<th>Priority</th>
<td>P
</td>
</tr>
<tr>
<th>Component</th>
<td>Backend: AArch64
</td>
</tr>
<tr>
<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
<tr>
<th>Reporter</th>
<td>llvm-dev@redking.me.uk
</td>
</tr>
<tr>
<th>CC</th>
<td>llvm-bugs@lists.llvm.org
</td>
</tr></table>
<p>
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<pre>Found during testing llvm-stress for D34157. I've done a basic bugpoint
reduction but nothing more.
define void @autogen_SD81673(i8* %arg) {
BB:
br label %CF658
CF658: ; preds = %CF658, %BB
br i1 undef, label %CF658, label %CF657
CF657: ; preds = %CF729, %CF658
%B45 = sdiv i8 undef, undef
%Sl47 = select i1 undef, i8* %arg, i8* %arg
br label %CF713
CF713: ; preds = %CF713, %CF657
%Cmp91 = icmp ule i64 340531, undef
br i1 %Cmp91, label %CF713, label %CF729
CF729: ; preds = %CF713
store i8 %B45, i8* %Sl47
%L106 = load i8, i8* %arg
store i8 91, i8* %Sl47
br i1 undef, label %CF657, label %CF668
CF668: ; preds = %CF729
store i8 %L106, i8* %arg
br label %CF665
CF665: ; preds = %CF730, %CF668
br label %CF730
CF730: ; preds = %CF730, %CF665
br i1 undef, label %CF730, label %CF665
}
llc -mtriple=aarch64-unknown
# After AArch64 load / store optimization pass
# Machine code for function autogen_SD81673: NoPHIs, TracksLiveness, NoVRegs
Function Live Ins: %X0
BB#0: derived from LLVM BB %CF657
Live Ins: %X0
%W8<def> = MOVZWi 12850, 0
%W8<def,tied1> = MOVKWi %W8<tied0>, 5, 16, %X8<imp-def>
Successors according to CFG: BB#1(?%)
BB#1: derived from LLVM BB %CF713
Live Ins: %X0 %X8
Predecessors according to CFG: BB#0 BB#1
%XZR<def> = SUBSXrs %X8<undef>, %X8, 0, %NZCV<imp-def>, %NZCV<imp-def>
Bcc 8, <BB#1>, %NZCV<imp-use>
Successors according to CFG: BB#1(0x7c000000 / 0x80000000 = 96.88%)
BB#2(0x0
4000000 / 0x80000000 = 3.12%)
BB#2: derived from LLVM BB %CF668
Live Ins: %X0
Predecessors according to CFG: BB#1
STRBBui %W8<undef>, %X0, 0; mem:ST1[%Sl47]
%W8<def> = ANDWri %W8, 7
%W9<def> = MOVZWi 91, 0
STRBBui %W9<kill>, %X0, 0; mem:ST1[%Sl47]
STRBBui %W8<kill>, %X0<kill>, 0; mem:ST1[%arg]
Successors according to CFG: BB#3(?%)
BB#3: derived from LLVM BB %CF730
Predecessors according to CFG: BB#2 BB#3
B <BB#3>
Successors according to CFG: BB#3(?%)
# End machine code for function autogen_SD81673.
*** Bad machine code: Using an undefined physical register ***
- function: autogen_SD81673
- basic block: BB#2 CF668 (0xc56300)
- instruction: %W8<def> = ANDWri
- operand 1: %W8
LLVM ERROR: Found 1 machine code errors.</pre>
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