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      <base href="https://bugs.llvm.org/">
    </head>
    <body><span class="vcard"><a class="email" href="mailto:spatel+llvm@rotateright.com" title="Sanjay Patel <spatel+llvm@rotateright.com>"> <span class="fn">Sanjay Patel</span></a>
</span> changed
          <a class="bz_bug_link 
          bz_status_RESOLVED  bz_closed"
   title="RESOLVED FIXED - [AVX] partly-implemented 256-bit ISA leads to codegen problems"
   href="https://bugs.llvm.org/show_bug.cgi?id=32790">bug 32790</a>
          <br>
             <table border="1" cellspacing="0" cellpadding="8">
          <tr>
            <th>What</th>
            <th>Removed</th>
            <th>Added</th>
          </tr>

         <tr>
           <td style="text-align:right;">Status</td>
           <td>NEW
           </td>
           <td>RESOLVED
           </td>
         </tr>

         <tr>
           <td style="text-align:right;">Resolution</td>
           <td>---
           </td>
           <td>FIXED
           </td>
         </tr></table>
      <p>
        <div>
            <b><a class="bz_bug_link 
          bz_status_RESOLVED  bz_closed"
   title="RESOLVED FIXED - [AVX] partly-implemented 256-bit ISA leads to codegen problems"
   href="https://bugs.llvm.org/show_bug.cgi?id=32790#c3">Comment # 3</a>
              on <a class="bz_bug_link 
          bz_status_RESOLVED  bz_closed"
   title="RESOLVED FIXED - [AVX] partly-implemented 256-bit ISA leads to codegen problems"
   href="https://bugs.llvm.org/show_bug.cgi?id=32790">bug 32790</a>
              from <span class="vcard"><a class="email" href="mailto:spatel+llvm@rotateright.com" title="Sanjay Patel <spatel+llvm@rotateright.com>"> <span class="fn">Sanjay Patel</span></a>
</span></b>
        <pre>Should be fixed after:
<a href="https://reviews.llvm.org/rL303997">https://reviews.llvm.org/rL303997</a>

$ ./llc -o - -mattr=avx 32790.ll 
        vpaddd  %xmm1, %xmm0, %xmm4
        vextractf128    $1, %ymm1, %xmm1
        vextractf128    $1, %ymm0, %xmm0
        vpaddd  %xmm1, %xmm0, %xmm0
        vextractf128    $1, %ymm2, %xmm1
        vpand   %xmm1, %xmm0, %xmm0    <--- narrow logic op
        vextractf128    $1, %ymm3, %xmm1
        vpsubd  %xmm1, %xmm0, %xmm0
        vpand   %xmm2, %xmm4, %xmm1    <--- narrow logic op
        vpsubd  %xmm3, %xmm1, %xmm1
        vinsertf128     $1, %xmm0, %ymm1, %ymm0
        retq</pre>
        </div>
      </p>


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