<html>
    <head>
      <base href="https://bugs.llvm.org/">
    </head>
    <body><table border="1" cellspacing="0" cellpadding="8">
        <tr>
          <th>Bug ID</th>
          <td><a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - Assertion since [AMDGPU] Fix incorrect register pressure calculation"
   href="https://bugs.llvm.org/show_bug.cgi?id=33159">33159</a>
          </td>
        </tr>

        <tr>
          <th>Summary</th>
          <td>Assertion since [AMDGPU] Fix incorrect register pressure calculation
          </td>
        </tr>

        <tr>
          <th>Product</th>
          <td>libraries
          </td>
        </tr>

        <tr>
          <th>Version</th>
          <td>trunk
          </td>
        </tr>

        <tr>
          <th>Hardware</th>
          <td>PC
          </td>
        </tr>

        <tr>
          <th>OS</th>
          <td>Linux
          </td>
        </tr>

        <tr>
          <th>Status</th>
          <td>NEW
          </td>
        </tr>

        <tr>
          <th>Severity</th>
          <td>enhancement
          </td>
        </tr>

        <tr>
          <th>Priority</th>
          <td>P
          </td>
        </tr>

        <tr>
          <th>Component</th>
          <td>Backend: AMDGPU
          </td>
        </tr>

        <tr>
          <th>Assignee</th>
          <td>unassignedbugs@nondot.org
          </td>
        </tr>

        <tr>
          <th>Reporter</th>
          <td>adf.lists@gmail.com
          </td>
        </tr>

        <tr>
          <th>CC</th>
          <td>llvm-bugs@lists.llvm.org
          </td>
        </tr></table>
      <p>
        <div>
        <pre>Testing with r9285 Tonga since 

commit 87fd46af9024ab56a9679ce32aed0965bab69d56
Author: Stanislav Mekhanoshin <<a href="mailto:Stanislav.Mekhanoshin@amd.com">Stanislav.Mekhanoshin@amd.com</a>>
Date:   Thu May 11 17:16:55 2017 +0000

    [AMDGPU] Fix incorrect register pressure calculation

    Earlier fix D32572 introduced a bug where live-ins were calculated
    for basic block instead of scheduling region. This change fixes it.

    Differential Revision: <a href="https://reviews.llvm.org/D33086">https://reviews.llvm.org/D33086</a>

    git-svn-id: <a href="https://llvm.org/svn/llvm-project/llvm/trunk@302812">https://llvm.org/svn/llvm-project/llvm/trunk@302812</a>
91177308-0d34-0410-b5e6-96231b3b80d8

I get an assertion with Unreal Tournament alpha.

The game loads and some tutorials work, but since above the death match
tutorial bails. It was never perfect (some scenery sometimes rendered black) -
but it was mostly OK - it is an alpha game.

UE4-Linux-Shipping: /mnt/sdb1/Gits/llvm/lib/CodeGen/LiveRangeEdit.cpp:258: void
llvm::LiveRangeEdit::eliminateDeadDef(llvm::MachineInstr*,
llvm::LiveRangeEdit::ToShrinkSet&, llvm::AliasAnalysis*): Assertion
`MI->allDefsAreDead() && "Def isn't really dead"' failed.
Signal 6 caught.

Attached output assert with R600_DEBUG=vs,ps,fs bz2</pre>
        </div>
      </p>


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