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<base href="https://bugs.llvm.org/">
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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - eliminate concat and extract ops with narrower vector ops"
href="https://bugs.llvm.org/show_bug.cgi?id=33026">33026</a>
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<th>Summary</th>
<td>eliminate concat and extract ops with narrower vector ops
</td>
</tr>
<tr>
<th>Product</th>
<td>libraries
</td>
</tr>
<tr>
<th>Version</th>
<td>trunk
</td>
</tr>
<tr>
<th>Hardware</th>
<td>PC
</td>
</tr>
<tr>
<th>OS</th>
<td>All
</td>
</tr>
<tr>
<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Severity</th>
<td>enhancement
</td>
</tr>
<tr>
<th>Priority</th>
<td>P
</td>
</tr>
<tr>
<th>Component</th>
<td>Transformation Utilities
</td>
</tr>
<tr>
<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
<tr>
<th>Reporter</th>
<td>spatel+llvm@rotateright.com
</td>
</tr>
<tr>
<th>CC</th>
<td>llvm-bugs@lists.llvm.org
</td>
</tr></table>
<p>
<div>
<pre>I was investigating a backend fix for this kind of thing, but it could also be
solved in IR (although I'm not sure which pass):
define <4 x i32> @do_not_use_256bit_op(<4 x i32> %a, <4 x i32> %b, <4 x i32>
%c, <4 x i32> %d) {
%concat1 = shufflevector <4 x i32> %a, <4 x i32> %b, <8 x i32> <i32 0, i32 1,
i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
%concat2 = shufflevector <4 x i32> %c, <4 x i32> %d, <8 x i32> <i32 0, i32 1,
i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
%and = and <8 x i32> %concat1, %concat2
%extract1 = shufflevector <8 x i32> %and, <8 x i32> undef, <4 x i32> <i32 0,
i32 1, i32 2, i32 3>
%extract2 = shufflevector <8 x i32> %and, <8 x i32> undef, <4 x i32> <i32 4,
i32 5, i32 6, i32 7>
%sub = sub <4 x i32> %extract1, %extract2
ret <4 x i32> %sub
}
This would be better as:
define <4 x i32> @do_not_use_256bit_op(<4 x i32> %a, <4 x i32> %b, <4 x i32>
%c, <4 x i32> %d) {
%and1 = and <4 x i32> %a, %c
%and2 = and <4 x i32> %b, %d
%sub = sub <4 x i32> %and1, %and2
ret <4 x i32> %sub
}</pre>
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</p>
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