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<base href="https://bugs.llvm.org/">
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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - Failure to recognise consecutive load chain from i64 types on 32-bit target"
href="https://bugs.llvm.org/show_bug.cgi?id=32940">32940</a>
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<th>Summary</th>
<td>Failure to recognise consecutive load chain from i64 types on 32-bit target
</td>
</tr>
<tr>
<th>Product</th>
<td>libraries
</td>
</tr>
<tr>
<th>Version</th>
<td>trunk
</td>
</tr>
<tr>
<th>Hardware</th>
<td>PC
</td>
</tr>
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<th>OS</th>
<td>Windows NT
</td>
</tr>
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<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Severity</th>
<td>enhancement
</td>
</tr>
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<th>Priority</th>
<td>P
</td>
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<th>Component</th>
<td>Backend: X86
</td>
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
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<th>Reporter</th>
<td>llvm-dev@redking.me.uk
</td>
</tr>
<tr>
<th>CC</th>
<td>llvm-bugs@lists.llvm.org
</td>
</tr></table>
<p>
<div>
<pre>llc -mtriple=i686-unknown -mcpu=btver2
define <2 x i64> @test_buildvector_v2i64(i64 %a0, i64 %a1) {
%ins0 = insertelement <2 x i64> undef, i64 %a0, i32 0
%ins1 = insertelement <2 x i64> %ins0, i64 %a1, i32 1
ret <2 x i64> %ins1
}
test_buildvector_v2i64:
vmovd 4(%esp), %xmm0 # xmm0 = mem[0],zero,zero,zero
vpinsrd $1, 8(%esp), %xmm0, %xmm0
vpinsrd $2, 12(%esp), %xmm0, %xmm0
vpinsrd $3, 16(%esp), %xmm0, %xmm0
retl
Despite being consecutive 4-byte loads, EltsFromConsecutiveLoads /
SelectionDAG::areNonVolatileConsecutiveLoads fails to recognise this.
It appears to be because
vpinsrd $3, 16(%esp), %xmm0, %xmm0
is offset from
vpinsrd $2, 12(%esp), %xmm0, %xmm0
while the other 2 loads are offset from
vmovd 4(%esp), %xmm0</pre>
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