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<base href="https://bugs.llvm.org/">
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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - Add scheduler classes for vector masked load/store operations"
href="https://bugs.llvm.org/show_bug.cgi?id=32857">32857</a>
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<th>Summary</th>
<td>Add scheduler classes for vector masked load/store operations
</td>
</tr>
<tr>
<th>Product</th>
<td>libraries
</td>
</tr>
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<th>Version</th>
<td>trunk
</td>
</tr>
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<th>Hardware</th>
<td>PC
</td>
</tr>
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<th>OS</th>
<td>All
</td>
</tr>
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<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Severity</th>
<td>enhancement
</td>
</tr>
<tr>
<th>Priority</th>
<td>P
</td>
</tr>
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<th>Component</th>
<td>Backend: X86
</td>
</tr>
<tr>
<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
<tr>
<th>Reporter</th>
<td>llvm-dev@redking.me.uk
</td>
</tr>
<tr>
<th>CC</th>
<td>andrew.v.tischenko@gmail.com, filcab@gmail.com, llvm-bugs@lists.llvm.org, simon.f.whittaker@gmail.com, spatel+llvm@rotateright.com
</td>
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<th>Blocks</th>
<td>32325
</td>
</tr></table>
<p>
<div>
<pre>The vector mask load/store operations (VMASKMOVPD/VMASKMOVPS etc.) often have
very different latency/throughput characteristics to basic load/store
instructions.</pre>
</div>
</p>
<div id="referenced">
<hr style="border: 1px dashed #969696">
<b>Referenced Bugs:</b>
<ul>
<li>
[<a class="bz_bug_link
bz_status_NEW "
title="NEW - [META][X86] Improve implementation and use of X86 scheduler models"
href="https://bugs.llvm.org/show_bug.cgi?id=32325">Bug 32325</a>] [META][X86] Improve implementation and use of X86 scheduler models
</li>
</ul>
</div>
<br>
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