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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - Add scheduler classes for integer/float horizontal operations"
href="https://bugs.llvm.org/show_bug.cgi?id=32801">32801</a>
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<th>Summary</th>
<td>Add scheduler classes for integer/float horizontal operations
</td>
</tr>
<tr>
<th>Product</th>
<td>libraries
</td>
</tr>
<tr>
<th>Version</th>
<td>trunk
</td>
</tr>
<tr>
<th>Hardware</th>
<td>PC
</td>
</tr>
<tr>
<th>OS</th>
<td>Windows NT
</td>
</tr>
<tr>
<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Severity</th>
<td>enhancement
</td>
</tr>
<tr>
<th>Priority</th>
<td>P
</td>
</tr>
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<th>Component</th>
<td>Backend: X86
</td>
</tr>
<tr>
<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
<tr>
<th>Reporter</th>
<td>llvm-dev@redking.me.uk
</td>
</tr>
<tr>
<th>CC</th>
<td>andrew.v.tischenko@gmail.com, llvm-bugs@lists.llvm.org, spatel+llvm@rotateright.com
</td>
</tr>
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<th>Blocks</th>
<td>26859, 32325
</td>
</tr></table>
<p>
<div>
<pre>The integer/float horizontal operations (PHADD, PHSUBD, HADDPS etc.) often have
very different latency/throughput characteristics to basic 'in-element'
arithmetic instructions.
They need separating from the existing classes and grouped into their own
integer/float classes to allow better scheduling (<a class="bz_bug_link
bz_status_NEW "
title="NEW - [META][X86] Improve implementation and use of X86 scheduler models"
href="show_bug.cgi?id=32325">Bug #32325</a>) and MC
optimization (<a class="bz_bug_link
bz_status_NEW "
title="NEW - [x86, SSE] only use phaddw / phaddd when optimizing for minsize?"
href="show_bug.cgi?id=26859">Bug #26859</a>).</pre>
</div>
</p>
<div id="referenced">
<hr style="border: 1px dashed #969696">
<b>Referenced Bugs:</b>
<ul>
<li>
[<a class="bz_bug_link
bz_status_NEW "
title="NEW - [x86, SSE] only use phaddw / phaddd when optimizing for minsize?"
href="https://bugs.llvm.org/show_bug.cgi?id=26859">Bug 26859</a>] [x86, SSE] only use phaddw / phaddd when optimizing for minsize?
</li>
<li>
[<a class="bz_bug_link
bz_status_NEW "
title="NEW - [META][X86] Improve implementation and use of X86 scheduler models"
href="https://bugs.llvm.org/show_bug.cgi?id=32325">Bug 32325</a>] [META][X86] Improve implementation and use of X86 scheduler models
</li>
</ul>
</div>
<br>
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