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<base href="https://bugs.llvm.org/">
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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - MachineCSE eliminates CMP instruction even when there are other CMPs in the same BB."
href="https://bugs.llvm.org/show_bug.cgi?id=32769">32769</a>
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<th>Summary</th>
<td>MachineCSE eliminates CMP instruction even when there are other CMPs in the same BB.
</td>
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<th>Product</th>
<td>libraries
</td>
</tr>
<tr>
<th>Version</th>
<td>trunk
</td>
</tr>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>All
</td>
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<th>Status</th>
<td>NEW
</td>
</tr>
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<th>Severity</th>
<td>normal
</td>
</tr>
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<th>Priority</th>
<td>P
</td>
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<th>Component</th>
<td>Common Code Generator Code
</td>
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<tr>
<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
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<th>Reporter</th>
<td>pftbest@gmail.com
</td>
</tr>
<tr>
<th>CC</th>
<td>llvm-bugs@lists.llvm.org
</td>
</tr></table>
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<pre>Created <span class=""><a href="attachment.cgi?id=18339" name="attach_18339" title="bug.ll">attachment 18339</a> <a href="attachment.cgi?id=18339&action=edit" title="bug.ll">[details]</a></span>
bug.ll
This can be reproduced on MSP430 target, IR is in the attachment.
After isel we have this basic block:
BB#0: derived from LLVM BB %start
Live Ins: %R12 %R13 %R14 %R15
%vreg3<def> = COPY %R15; GR16:%vreg3
%vreg2<def> = COPY %R14; GR16:%vreg2
%vreg1<def> = COPY %R13; GR16:%vreg1
%vreg0<def> = COPY %R12; GR16:%vreg0
CMP16rr %vreg1, %vreg3, %SR<imp-def>; GR16:%vreg1,%vreg3
%vreg4<def> = COPY %SR; GR16:%vreg4
%vreg5<def> = MOV16ri 1; GR16:%vreg5
%vreg6<def,tied1> = BIC16rr %vreg5<tied0>, %vreg4, %SR<imp-def,dead>;
GR16:%vreg6,%vreg5,%vreg4
CMP16rr %vreg0, %vreg2, %SR<imp-def>; GR16:%vreg0,%vreg2
%vreg7<def> = COPY %SR; GR16:%vreg7
%vreg8<def,tied1> = BIC16rr %vreg5<tied0>, %vreg7, %SR<imp-def,dead>;
GR16:%vreg8,%vreg5,%vreg7
CMP16rr %vreg1, %vreg3, %SR<imp-def,dead>; GR16:%vreg1,%vreg3
JCC <BB#2>, 0, %SR<imp-use>
Successors according to CFG: BB#1(?%) BB#2(?%)
then after CSE it looks like this:
BB#0: derived from LLVM BB %start
Live Ins: %R12 %R13 %R14 %R15
%vreg3<def> = COPY %R15; GR16:%vreg3
%vreg2<def> = COPY %R14; GR16:%vreg2
%vreg1<def> = COPY %R13; GR16:%vreg1
%vreg0<def> = COPY %R12; GR16:%vreg0
CMP16rr %vreg1, %vreg3, %SR<imp-def>; GR16:%vreg1,%vreg3
%vreg4<def> = COPY %SR; GR16:%vreg4
%vreg5<def> = MOV16ri 1; GR16:%vreg5
%vreg6<def,tied1> = BIC16rr %vreg5<tied0>, %vreg4, %SR<imp-def,dead>;
GR16:%vreg6,%vreg5,%vreg4
CMP16rr %vreg0, %vreg2, %SR<imp-def>; GR16:%vreg0,%vreg2
%vreg7<def> = COPY %SR; GR16:%vreg7
%vreg8<def,tied1> = BIC16rr %vreg5<tied0>, %vreg7, %SR<imp-def,dead>;
GR16:%vreg8,%vreg5,%vreg7
JCC <BB#2>, 0, %SR<imp-use>
Successors according to CFG: BB#1(?%) BB#2(?%)
CSE removed the last CMP instruction because it's the same as the first one.
But there is also another CMP in between them.</pre>
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