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<base href="https://bugs.llvm.org/">
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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - [ppc] prefetch instruction blocks the optimization of st/ld with same address"
href="https://bugs.llvm.org/show_bug.cgi?id=32365">32365</a>
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<th>Summary</th>
<td>[ppc] prefetch instruction blocks the optimization of st/ld with same address
</td>
</tr>
<tr>
<th>Product</th>
<td>libraries
</td>
</tr>
<tr>
<th>Version</th>
<td>trunk
</td>
</tr>
<tr>
<th>Hardware</th>
<td>PC
</td>
</tr>
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<th>OS</th>
<td>Linux
</td>
</tr>
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<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Severity</th>
<td>enhancement
</td>
</tr>
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<th>Priority</th>
<td>P
</td>
</tr>
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<th>Component</th>
<td>Backend: PowerPC
</td>
</tr>
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
<tr>
<th>Reporter</th>
<td>carrot@google.com
</td>
</tr>
<tr>
<th>CC</th>
<td>llvm-bugs@lists.llvm.org
</td>
</tr></table>
<p>
<div>
<pre>Compile the following source code with options -m64 -O2 -mvsx -mcpu=power8
struct C {
struct C *next_;
int length_;
};
int foo(struct C* c){
struct C* next = c->next_->next_;
c->next_ = next;
c->length_--;
__builtin_prefetch(next, 0, 0);
return c->length_;
}
LLVM generates:
foo: # @foo
.Lfunc_begin0:
# BB#0: # %entry
ld 4, 0(3)
lwz 5, 8(3)
ld 4, 0(4)
addi 5, 5, -1
stw 5, 8(3) // store length_
std 4, 0(3)
dcbt 0, 4
ori 2, 2, 0
lwa 3, 8(3) // load length_
blr
The lwa instruction is not necessary since the value of length_ is already in
r5. This problem impacts the performance of tcmalloc.</pre>
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</p>
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