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<base href="https://bugs.llvm.org/">
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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - [x86] lshr <4 x i32> generates bad code"
href="https://bugs.llvm.org/show_bug.cgi?id=32247">32247</a>
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<th>Summary</th>
<td>[x86] lshr <4 x i32> generates bad code
</td>
</tr>
<tr>
<th>Product</th>
<td>new-bugs
</td>
</tr>
<tr>
<th>Version</th>
<td>3.9
</td>
</tr>
<tr>
<th>Hardware</th>
<td>PC
</td>
</tr>
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<th>OS</th>
<td>Linux
</td>
</tr>
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<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Severity</th>
<td>enhancement
</td>
</tr>
<tr>
<th>Priority</th>
<td>P
</td>
</tr>
<tr>
<th>Component</th>
<td>new bugs
</td>
</tr>
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
<tr>
<th>Reporter</th>
<td>simonas+llvm.org@kazlauskas.me
</td>
</tr>
<tr>
<th>CC</th>
<td>llvm-bugs@lists.llvm.org
</td>
</tr></table>
<p>
<div>
<pre>Compiling the following IR:
define <4 x i32> @test(<4 x i32>, <4 x i32>) {
entry-block:
%a = lshr <4 x i32> %0, %1
ret <4 x i32> %a
}
Results in following assembly:
test: # @test
.cfi_startproc
# BB#0: # %entry-block
movdqa %xmm1, %xmm2
psrldq $12, %xmm2 # xmm2 =
xmm2[12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
movdqa %xmm0, %xmm3
psrld %xmm2, %xmm3
movdqa %xmm1, %xmm2
psrlq $32, %xmm2
movdqa %xmm0, %xmm4
psrld %xmm2, %xmm4
movsd %xmm4, %xmm3 # xmm3 = xmm4[0],xmm3[1]
pshufd $237, %xmm3, %xmm2 # xmm2 = xmm3[1,3,2,3]
pxor %xmm3, %xmm3
movdqa %xmm1, %xmm4
punpckhdq %xmm3, %xmm4 # xmm4 =
xmm4[2],xmm3[2],xmm4[3],xmm3[3]
movdqa %xmm0, %xmm5
psrld %xmm4, %xmm5
punpckldq %xmm3, %xmm1 # xmm1 =
xmm1[0],xmm3[0],xmm1[1],xmm3[1]
psrld %xmm1, %xmm0
movsd %xmm0, %xmm5 # xmm5 = xmm0[0],xmm5[1]
pshufd $232, %xmm5, %xmm0 # xmm0 = xmm5[0,2,2,3]
punpckldq %xmm2, %xmm0 # xmm0 =
xmm0[0],xmm2[0],xmm0[1],xmm2[1]
retq
That’s a lot of work being done where two instructions would suffice:
psrld %xmm1, %xmm0
ret
LLVM is insisting shifting every component separately, while it is not
necessary. Also reproducible with a constant shift offset (generates a bit less
code, but underlying problem remains):
define <4 x i32> @test(<4 x i32>) {
entry-block:
%a = lshr <4 x i32> %0, <i32 1, i32 2, i32 3, i32 4>
ret <4 x i32> %a
}
Potentially reproducible for all other shift variants too.</pre>
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