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<base href="https://bugs.llvm.org/">
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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - [ppc] wrong code generated for bswap(int32) and followed by store16"
href="https://bugs.llvm.org/show_bug.cgi?id=32063">32063</a>
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<th>Summary</th>
<td>[ppc] wrong code generated for bswap(int32) and followed by store16
</td>
</tr>
<tr>
<th>Product</th>
<td>libraries
</td>
</tr>
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<th>Version</th>
<td>trunk
</td>
</tr>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>Linux
</td>
</tr>
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<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Severity</th>
<td>enhancement
</td>
</tr>
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<th>Priority</th>
<td>P
</td>
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<th>Component</th>
<td>Backend: PowerPC
</td>
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
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<th>Reporter</th>
<td>carrot@google.com
</td>
</tr>
<tr>
<th>CC</th>
<td>llvm-bugs@lists.llvm.org
</td>
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<p>
<div>
<pre>Compile the following code with options -m64 -O2 -mvsx -mcpu=power8
typedef unsigned int uint32_t;
typedef unsigned char uint8_t;
typedef unsigned short int uint16_t;
struct blah {
uint16_t f1;
uint8_t f2;
};
void foo(uint32_t v, struct blah *p) {
unsigned int __bsx = v;
p->f1 = (((__bsx & 0xff000000u) >> 24) | ((__bsx & 0x00ff0000u) >> 8) |
((__bsx & 0x0000ff00u) << 8) | ((__bsx & 0x000000ffu) << 24)) & 0xffff;
}
LLVM generates
foo: # @foo
.Lfunc_begin0:
# BB#0: # %entry
rlwinm 3, 3, 0, 0, 15
stwbrx 3, 0, 4
blr
The source code stores a 16bit value, the generated code stores 32bit value.
The problem is in function PPCTargetLowering::PerformDAGCombine, when it
detects a case
bswap
store
It transform it to PPCISD::STBRX, but it doesn't consider the case that the
operand size of bswap may be larger than store size. When it occurs, we need 2
modifications,
1 For the last operand of PPCISD::STBRX, we should not use
DAG.getValueType(N->getOperand(1).getValueType()), instead we should use
cast<StoreSDNode>(N)->getMemoryVT().
2 Before PPCISD::STBRX, we need to shift the original operand of bswap to the
right side.</pre>
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</p>
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