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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - Constrained FP operations should have implicit use/def for FP environment registers"
href="https://llvm.org/bugs/show_bug.cgi?id=31284">31284</a>
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<th>Summary</th>
<td>Constrained FP operations should have implicit use/def for FP environment registers
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<th>Product</th>
<td>libraries
</td>
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<th>Version</th>
<td>trunk
</td>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>All
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<th>Status</th>
<td>NEW
</td>
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<th>Severity</th>
<td>normal
</td>
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<th>Priority</th>
<td>P
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<th>Component</th>
<td>Core LLVM classes
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>andrew.kaylor@intel.com
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<th>CC</th>
<td>llvm-bugs@lists.llvm.org
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<th>Classification</th>
<td>Unclassified
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<p>
<div>
<pre>This is a pre-emptive bug for the implementation of constrained FP intrinsics.
When these intrinsics are translated to machine instructions, an implicit use
and/or def of target-specific FP environment registers should be added to the
instructions selected. These registers aren't currently modeled for FP
instructions, and for the default, non-constrained case it probably makes sense
to continue not modeling them, but when the constrained intrinsics are used
these accesses need to be modeled to prevent unwanted code motion.
For example, if a program uses an intrinsic such as llvm.x86.sse.ldmxcsr to
change the rounding mode we need to be certain that FP operations are not moved
across the LDMXCSR instruction.</pre>
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