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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - Terrible ARM shuffle lowering for blend with constant zero"
href="https://llvm.org/bugs/show_bug.cgi?id=31282">31282</a>
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<th>Summary</th>
<td>Terrible ARM shuffle lowering for blend with constant zero
</td>
</tr>
<tr>
<th>Product</th>
<td>libraries
</td>
</tr>
<tr>
<th>Version</th>
<td>trunk
</td>
</tr>
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<th>Hardware</th>
<td>All
</td>
</tr>
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<th>OS</th>
<td>All
</td>
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<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Severity</th>
<td>normal
</td>
</tr>
<tr>
<th>Priority</th>
<td>P
</td>
</tr>
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<th>Component</th>
<td>Backend: ARM
</td>
</tr>
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
<tr>
<th>Reporter</th>
<td>efriedma@codeaurora.org
</td>
</tr>
<tr>
<th>CC</th>
<td>llvm-bugs@lists.llvm.org
</td>
</tr>
<tr>
<th>Classification</th>
<td>Unclassified
</td>
</tr></table>
<p>
<div>
<pre>Testcase:
define <8 x i8> @f(<8 x i8> %t) {
%r = shufflevector <8 x i8> <i8 0, i8 0, i8 undef, i8 undef, i8 undef, i8
undef, i8 undef, i8 undef>, <8 x i8> %t, <8 x i32> <i32 0, i32 1, i32 10, i32
11, i32 12, i32 13, i32 14, i32 15>
ret <8 x i8> %r
}
With llc -mtriple=armv7--linux-gnueabihf:
vldr d18, .LCPI0_0
vorr d17, d0, d0
vmov.i32 d16, #0x0
vtbl.8 d0, {d16, d17}, d18
bx lr
By contrast, an equivalent "and" instruction generates the following:
vmov.i64 d16, #0xffffffffffff0000
vand d0, d0, d16
bx lr
(SROA likes to generate this sort of shuffle.)</pre>
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