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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - [mc][gfx8] No checks for ADDC/SUBB/V_CNDMASK source operand restrictions"
href="https://llvm.org/bugs/show_bug.cgi?id=30829">30829</a>
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<th>Summary</th>
<td>[mc][gfx8] No checks for ADDC/SUBB/V_CNDMASK source operand restrictions
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<th>Product</th>
<td>libraries
</td>
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<th>Version</th>
<td>trunk
</td>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>Windows NT
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<th>Status</th>
<td>NEW
</td>
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<th>Severity</th>
<td>normal
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<th>Priority</th>
<td>P
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<th>Component</th>
<td>Backend: AMDGPU
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<th>Assignee</th>
<td>artem.tamazov@amd.com
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<th>Reporter</th>
<td>i.am.perminov@gmail.com
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<th>CC</th>
<td>andrey.kasaurov@gmail.com, artem.tamazov@amd.com, i.am.perminov@gmail.com, llvm-bugs@lists.llvm.org, nikolay.haustov@amd.com, sam.kolton@amd.com, valery.pykhtin@gmail.com
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<th>Classification</th>
<td>Unclassified
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<p>
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<pre>SGPR, M0, EXEC or literal constant are not allowed for ADDC/SUBB/V_CNDMASK
instructions. Still assembler allows illegal encodings like:
v_addc_u32 v40, vcc, s49, 0, vcc</pre>
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