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<base href="https://llvm.org/bugs/" />
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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - [X86][SSE] Merging of zext into splat shuffle results in constant mask generation"
href="https://llvm.org/bugs/show_bug.cgi?id=30780">30780</a>
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<th>Summary</th>
<td>[X86][SSE] Merging of zext into splat shuffle results in constant mask generation
</td>
</tr>
<tr>
<th>Product</th>
<td>libraries
</td>
</tr>
<tr>
<th>Version</th>
<td>trunk
</td>
</tr>
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<th>Hardware</th>
<td>PC
</td>
</tr>
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<th>OS</th>
<td>Windows NT
</td>
</tr>
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<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Severity</th>
<td>normal
</td>
</tr>
<tr>
<th>Priority</th>
<td>P
</td>
</tr>
<tr>
<th>Component</th>
<td>Backend: X86
</td>
</tr>
<tr>
<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
<tr>
<th>Reporter</th>
<td>llvm-dev@redking.me.uk
</td>
</tr>
<tr>
<th>CC</th>
<td>llvm-bugs@lists.llvm.org, spatel+llvm@rotateright.com
</td>
</tr>
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<th>Classification</th>
<td>Unclassified
</td>
</tr></table>
<p>
<div>
<pre>For the sext+splat we use movsbl and splat the sign extended i32. But for the
zext+splat we merge the zext into the splat shuffle, requiring a 16-byte
constant mask. If we splat to a 256-bit vector we end up with a 32-byte
constant mask!
; llc -mtriple=x86_64-unknown -mcpu=btver2
define <4 x i32> @splat_i8(i8 %in) {
%zext = sext i8 %in to i32
%insert = insertelement <4 x i32> undef, i32 %zext, i32 0
%splat = shufflevector <4 x i32> %insert, <4 x i32> undef, <4 x i32>
zeroinitializer
ret <4 x i32> %splat
}
splat_i8:
movsbl %dil, %eax
vmovd %eax, %xmm0
vpshufd $0, %xmm0, %xmm0 # xmm0 = xmm0[0,0,0,0]
retq
define <4 x i32> @splat_u8(i8 %in) {
%zext = zext i8 %in to i32
%insert = insertelement <4 x i32> undef, i32 %zext, i32 0
%splat = shufflevector <4 x i32> %insert, <4 x i32> undef, <4 x i32>
zeroinitializer
ret <4 x i32> %splat
}
splat_u8:
vmovd %edi, %xmm0
vpshufd $0, %xmm0, %xmm0 # xmm0 = xmm0[0,0,0,0]
vpand .LCPI1_0(%rip), %xmm0, %xmm0
retq
define <8 x i32> @splat_u8_256(i8 %in) {
%zext = zext i8 %in to i32
%insert = insertelement <8 x i32> undef, i32 %zext, i32 0
%splat = shufflevector <8 x i32> %insert, <8 x i32> undef, <8 x i32>
zeroinitializer
ret <8 x i32> %splat
}
splat_u8_256:
vmovd %edi, %xmm0
vpshufd $0, %xmm0, %xmm0 # xmm0 = xmm0[0,0,0,0]
vinsertf128 $1, %xmm0, %ymm0, %ymm0
vandps .LCPI2_0(%rip), %ymm0, %ymm0
retq
Interestingly, on AVX2 machines this doesn't occur:
; -mtriple=x86_64-unknown -mcpu=bdver4
splat_u8:
movzbl %dil, %eax
vmovd %eax, %xmm0
vbroadcastss %xmm0, %xmm0
retq
splat_u8_256:
movzbl %dil, %eax
vmovd %eax, %xmm0
vbroadcastss %xmm0, %ymm0
retq</pre>
</div>
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