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<base href="https://llvm.org/bugs/" />
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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - [MIPS] Emitted instructions do not meet their predicates"
href="https://llvm.org/bugs/show_bug.cgi?id=30714">30714</a>
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<th>Summary</th>
<td>[MIPS] Emitted instructions do not meet their predicates
</td>
</tr>
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<th>Product</th>
<td>new-bugs
</td>
</tr>
<tr>
<th>Version</th>
<td>trunk
</td>
</tr>
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<th>Hardware</th>
<td>PC
</td>
</tr>
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<th>OS</th>
<td>All
</td>
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<th>Status</th>
<td>NEW
</td>
</tr>
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<th>Severity</th>
<td>normal
</td>
</tr>
<tr>
<th>Priority</th>
<td>P
</td>
</tr>
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<th>Component</th>
<td>new bugs
</td>
</tr>
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
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<th>Reporter</th>
<td>simon.dardis@imgtec.com
</td>
</tr>
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<th>CC</th>
<td>llvm-bugs@lists.llvm.org
</td>
</tr>
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<th>Classification</th>
<td>Unclassified
</td>
</tr></table>
<p>
<div>
<pre>Certain instructions can be emitted in cases where they do not meet their
predicates.
See: <a href="https://reviews.llvm.org/D25618">https://reviews.llvm.org/D25618</a> and <a href="https://reviews.llvm.org/D25622">https://reviews.llvm.org/D25622</a>
Quoting D25622:
The following tests fail when this patch is applied.
Failing Tests (26):
LLVM :: CodeGen/Mips/cconv/callee-saved-float.ll
LLVM :: CodeGen/Mips/micromips-atomic1.ll
LLVM :: CodeGen/Mips/tailcall/tailcall-wrong-isa.ll
LLVM :: MC/Mips/cprestore-noreorder.s
LLVM :: MC/Mips/cprestore-reorder.s
LLVM :: MC/Mips/elf_eflags_mips16.s
LLVM :: MC/Mips/expansion-jal-sym-pic.s
LLVM :: MC/Mips/expr1.s
LLVM :: MC/Mips/micromips-16-bit-instructions.s
LLVM :: MC/Mips/micromips-alu-instructions.s
LLVM :: MC/Mips/micromips-branch-fixup.s
LLVM :: MC/Mips/micromips-branch-instructions.s
LLVM :: MC/Mips/micromips-control-instructions.s
LLVM :: MC/Mips/micromips-dsp/valid-micromips32r3.s
LLVM :: MC/Mips/micromips-el-fixup-data.s
LLVM :: MC/Mips/micromips-expansions.s
LLVM :: MC/Mips/micromips-fpu-instructions.s
LLVM :: MC/Mips/micromips-jump-instructions.s
LLVM :: MC/Mips/micromips-jump26.s
LLVM :: MC/Mips/micromips-tailr.s
LLVM :: MC/Mips/micromips/valid.s
LLVM :: MC/Mips/micromips32r6/valid.s
LLVM :: MC/Mips/mips2/valid.s
LLVM :: MC/Mips/mips3/valid.s
LLVM :: MC/Mips/mips4/valid.s
LLVM :: MC/Mips/mips5/valid.s
Some look like bugs but others look like they are deliberate (e.g.
SYNC is using a loophole to implement the MIPS-II version as an
alias of the MIPS32 version).</pre>
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