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      <base href="https://llvm.org/bugs/" />
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    <body><table border="1" cellspacing="0" cellpadding="8">
        <tr>
          <th>Bug ID</th>
          <td><a class="bz_bug_link 
          bz_status_NEW "
   title="NEW --- - add _allow_cpu_features intrinsic (like the intel compiler)"
   href="https://llvm.org/bugs/show_bug.cgi?id=30634">30634</a>
          </td>
        </tr>

        <tr>
          <th>Summary</th>
          <td>add _allow_cpu_features intrinsic (like the intel compiler)
          </td>
        </tr>

        <tr>
          <th>Product</th>
          <td>libraries
          </td>
        </tr>

        <tr>
          <th>Version</th>
          <td>trunk
          </td>
        </tr>

        <tr>
          <th>Hardware</th>
          <td>PC
          </td>
        </tr>

        <tr>
          <th>OS</th>
          <td>All
          </td>
        </tr>

        <tr>
          <th>Status</th>
          <td>NEW
          </td>
        </tr>

        <tr>
          <th>Severity</th>
          <td>enhancement
          </td>
        </tr>

        <tr>
          <th>Priority</th>
          <td>P
          </td>
        </tr>

        <tr>
          <th>Component</th>
          <td>Backend: X86
          </td>
        </tr>

        <tr>
          <th>Assignee</th>
          <td>unassignedbugs@nondot.org
          </td>
        </tr>

        <tr>
          <th>Reporter</th>
          <td>alkis@evlogimenos.com
          </td>
        </tr>

        <tr>
          <th>CC</th>
          <td>llvm-bugs@lists.llvm.org
          </td>
        </tr>

        <tr>
          <th>Classification</th>
          <td>Unclassified
          </td>
        </tr></table>
      <p>
        <div>
        <pre><a href="https://software.intel.com/en-us/articles/new-intrinsic-allow-cpu-features-support">https://software.intel.com/en-us/articles/new-intrinsic-allow-cpu-features-support</a>

This intrinsic, among other things, makes it possible to build composable
components that are optimal for all microarchitectures in a single binary
(something like function multi versioning but better).

Bonus points if all instructions dominated by a call to the intrinsic are also
scheduled as per the best matching CPU:

if (skylake) {
  __allow_cpu_features(_FEATURE_BMI2);
  // do stuff
  // use bmi2 intrinsics here even if -march=X doesn't support them
}

Code in "// do stuff, etc" should be tuned as if the cpu was haswell even if
the rest of the code is tuned for westmere. The rationale is that haswell is
the earliest processor supporting FEATURE_BMI2 and it is not introduced earlier
than the per file processor.</pre>
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