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      <base href="https://llvm.org/bugs/" />
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    <body><table border="1" cellspacing="0" cellpadding="8">
        <tr>
          <th>Bug ID</th>
          <td><a class="bz_bug_link 
          bz_status_NEW "
   title="NEW --- - Memory model spec allows for tearing between same-size accesses"
   href="https://llvm.org/bugs/show_bug.cgi?id=30570">30570</a>
          </td>
        </tr>

        <tr>
          <th>Summary</th>
          <td>Memory model spec allows for tearing between same-size accesses
          </td>
        </tr>

        <tr>
          <th>Product</th>
          <td>new-bugs
          </td>
        </tr>

        <tr>
          <th>Version</th>
          <td>unspecified
          </td>
        </tr>

        <tr>
          <th>Hardware</th>
          <td>All
          </td>
        </tr>

        <tr>
          <th>OS</th>
          <td>All
          </td>
        </tr>

        <tr>
          <th>Status</th>
          <td>NEW
          </td>
        </tr>

        <tr>
          <th>Severity</th>
          <td>normal
          </td>
        </tr>

        <tr>
          <th>Priority</th>
          <td>P
          </td>
        </tr>

        <tr>
          <th>Component</th>
          <td>new bugs
          </td>
        </tr>

        <tr>
          <th>Assignee</th>
          <td>unassignedbugs@nondot.org
          </td>
        </tr>

        <tr>
          <th>Reporter</th>
          <td>ajeffrey@mozilla.com
          </td>
        </tr>

        <tr>
          <th>CC</th>
          <td>llvm-bugs@lists.llvm.org
          </td>
        </tr>

        <tr>
          <th>Classification</th>
          <td>Unclassified
          </td>
        </tr></table>
      <p>
        <div>
        <pre>At the moment, the LLVM memory model specification allows for tearing. This is
correct for mixed-size or unaligned access, for example if mutexes are used for
large accesses, and atomic instructions are used for small accesses.
Unfortunately, the spec as it currently stands allows for tearing even when the
accesses are all of the same size.

The problem is that in
<a href="http://llvm.org/docs/LangRef.html#memory-model-for-concurrent-operations">http://llvm.org/docs/LangRef.html#memory-model-for-concurrent-operations</a>, there
is no guarantee that each of the W_byte operations observed by one R come from
the same W, even when all accesses are to the same address range.

Adding a new sentence to the specification would fix this, something like "If
an atomic read R can only see atomic writes to the same address range, then
there must be a single write W such that each R_byte in R chooses a W_byte from
W."</pre>
        </div>
      </p>
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