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<base href="https://llvm.org/bugs/" />
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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - [AVX512F] Suboptimal code generated for a _mm_mask_store_sd expansion"
href="https://llvm.org/bugs/show_bug.cgi?id=30563">30563</a>
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<th>Summary</th>
<td>[AVX512F] Suboptimal code generated for a _mm_mask_store_sd expansion
</td>
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<th>Product</th>
<td>libraries
</td>
</tr>
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<th>Version</th>
<td>trunk
</td>
</tr>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>All
</td>
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<th>Status</th>
<td>NEW
</td>
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<th>Severity</th>
<td>normal
</td>
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<th>Priority</th>
<td>P
</td>
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<th>Component</th>
<td>Backend: X86
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>zvi.rackover@intel.com
</td>
</tr>
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<th>CC</th>
<td>llvm-bugs@lists.llvm.org
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<th>Classification</th>
<td>Unclassified
</td>
</tr></table>
<p>
<div>
<pre>We currently do not support the AVX512F _mm_mask_store_sd
[<a href="https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_mask_store_sd">https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_mask_store_sd</a>]
intrinics, but a reasonable expansion of this intrinsics to LLVM IR may be:
define void @_mm_mask_store_sd(double* nocapture %__W, i8 zeroext %__U, <2 x
double> %__A) local_unnamed_addr {
entry:
%tobool.i = trunc i8 %__U to i1
%mask = insertelement <2 x i1> <i1 undef, i1 false>, i1 %tobool.i, i32 0
%V = bitcast double * %__W to <2 x double>*
call void @llvm.masked.store.v2f64.p0v2f64(<2 x double> %__A, <2 x double>*
%V, i32 16, <2 x i1> %mask)
ret void
}
declare void @llvm.masked.store.v2f64.p0v2f64(<2 x double>, <2 x double>*,
i32, <2 x i1>)
which should be lowered to:
==========================================
kmovw %esi, %k1
vmovsd %xmm0, (%rdi){%k1}
==========================================
'llc -mcpu=knl' generates:
==========================================
vmovq %rsi, %xmm1
vpsllq $63, %xmm1, %xmm1
vpsrad $31, %xmm1, %xmm1
vpshufd $245, %xmm1, %xmm1 # xmm1 = xmm1[1,1,3,3]
vmaskmovpd %xmm0, %xmm1, (%rdi)
retq
==========================================
'llc -mcpu=skylake-avx512' generates:
==========================================
andl $1, %esi
kmovw %esi, %k0
kxorw %k0, %k0, %k1
kshiftrw $1, %k1, %k1
kshiftlw $1, %k1, %k1
korw %k0, %k1, %k1
vmovapd %xmm0, (%rdi) {%k1}
retq
==========================================</pre>
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