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<base href="https://llvm.org/bugs/" />
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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - [AVX512F] Suboptimal code generated for a _mm_mask_move_sd expansion"
href="https://llvm.org/bugs/show_bug.cgi?id=30561">30561</a>
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<th>Summary</th>
<td>[AVX512F] Suboptimal code generated for a _mm_mask_move_sd expansion
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<th>Product</th>
<td>libraries
</td>
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<th>Version</th>
<td>trunk
</td>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>All
</td>
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<th>Status</th>
<td>NEW
</td>
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<th>Severity</th>
<td>normal
</td>
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<th>Priority</th>
<td>P
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<th>Component</th>
<td>Backend: X86
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>zvi.rackover@intel.com
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<th>CC</th>
<td>llvm-bugs@lists.llvm.org
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<th>Classification</th>
<td>Unclassified
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<p>
<div>
<pre>We currently do not support the AVX512F _mm_mask_move_sd
[<a href="https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_mask_move_sd">https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_mask_move_sd</a>]
intrinics, but a reasonable expansion of this intrinsics to LLVM IR may be:
define <2 x double> _mm_mask_move_sd(<4 x float> %__W, i8 zeroext %__U, <2 x
double> %__A, <2 x double> %__B) local_unnamed_addr #2 {
entry:
%0 = bitcast <4 x float> %__W to <2 x double>
%and.i = and i8 %__U, 1
%tobool.i = icmp ne i8 %and.i, 0
%__B.elt.i = extractelement <2 x double> %__B, i32 0
%__W.elt.i = extractelement <2 x double> %0, i32 0
%vecext.i = select i1 %tobool.i, double %__B.elt.i, double %__W.elt.i
%vecins.i = insertelement <2 x double> %__A, double %vecext.i, i32 0
ret <2 x double> %vecins.i
}
which should be lowered to:
==========================================
kmovw %edi, %k1
vmovsd %xmm2, %xmm1, %xmm0{%k1}
retq
==========================================
'llc -mcpu=knl' generates:
==========================================
testb $1, %dil
jne .LBB0_2
# BB#1: # %entry
vmovapd %xmm0, %xmm2
.LBB0_2: # %entry
vmovsd %xmm2, %xmm1, %xmm0 # xmm0 = xmm2[0],xmm1[1]
retq
==========================================</pre>
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