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<base href="https://llvm.org/bugs/" />
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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - [X86][SSE] Failure to recognise uitofp conversions that can be performed as sitofp"
href="https://llvm.org/bugs/show_bug.cgi?id=29079">29079</a>
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<th>Summary</th>
<td>[X86][SSE] Failure to recognise uitofp conversions that can be performed as sitofp
</td>
</tr>
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<th>Product</th>
<td>libraries
</td>
</tr>
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<th>Version</th>
<td>trunk
</td>
</tr>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>All
</td>
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<th>Status</th>
<td>NEW
</td>
</tr>
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<th>Severity</th>
<td>normal
</td>
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<th>Priority</th>
<td>P
</td>
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<th>Component</th>
<td>Backend: X86
</td>
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
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<th>Reporter</th>
<td>llvm-dev@redking.me.uk
</td>
</tr>
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<th>CC</th>
<td>llvm-bugs@lists.llvm.org
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<th>Classification</th>
<td>Unclassified
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</tr></table>
<p>
<div>
<pre>Related to [Bugzilla #29078]. If we have masked the sign bits of an integer
source then we can safely replace (slow) uitofp conversions with sitofp.
Note that it'd be even better if we can handle non-uniform masks!
define <4 x float> @mask_ucvt_4i32_4f32(<4 x i32> %a) {
%and = and <4 x i32> %a, <i32 255, i32 255, i32 255, i32 255>
%cvt = uitofp <4 x i32> %and to <4 x float>
ret <4 x float> %cvt
}
define <4 x double> @mask_ucvt_4i32_4f64(<4 x i32> %a) {
%and = and <4 x i32> %a, <i32 255, i32 255, i32 4095, i32 65595>
%cvt = uitofp <4 x i32> %and to <4 x double>
ret <4 x double> %cvt
}
"~/LLVM/build/bin/llc -mcpu=btver2"
_mask_ucvt_4i32_4f32:vpand LCPI0_0(%rip), %xmm0, %xmm0
vpblendw $170, LCPI0_1(%rip), %xmm0, %xmm1 ## xmm1 =
xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7]
vpsrld $16, %xmm0, %xmm0
vpblendw $170, LCPI0_2(%rip), %xmm0, %xmm0 ## xmm0 =
xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7]
vaddps LCPI0_3(%rip), %xmm0, %xmm0
vaddps %xmm0, %xmm1, %xmm0
retq
_mask_ucvt_4i32_4f64:
vpand LCPI1_0(%rip), %xmm0, %xmm0
vpand LCPI1_1(%rip), %xmm0, %xmm1
vpsrld $16, %xmm0, %xmm0
vcvtdq2pd %xmm0, %ymm0
vmulpd LCPI1_2(%rip), %ymm0, %ymm0
vcvtdq2pd %xmm1, %ymm1
vaddpd %ymm1, %ymm0, %ymm0
retq</pre>
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</p>
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