<html>
    <head>
      <base href="https://llvm.org/bugs/" />
    </head>
    <body><table border="1" cellspacing="0" cellpadding="8">
        <tr>
          <th>Bug ID</th>
          <td><a class="bz_bug_link 
          bz_status_NEW "
   title="NEW --- - [IPRA] Reg Usage Info Collector too aggressive."
   href="https://llvm.org/bugs/show_bug.cgi?id=28567">28567</a>
          </td>
        </tr>

        <tr>
          <th>Summary</th>
          <td>[IPRA] Reg Usage Info Collector too aggressive.
          </td>
        </tr>

        <tr>
          <th>Product</th>
          <td>libraries
          </td>
        </tr>

        <tr>
          <th>Version</th>
          <td>trunk
          </td>
        </tr>

        <tr>
          <th>Hardware</th>
          <td>PC
          </td>
        </tr>

        <tr>
          <th>OS</th>
          <td>Linux
          </td>
        </tr>

        <tr>
          <th>Status</th>
          <td>NEW
          </td>
        </tr>

        <tr>
          <th>Severity</th>
          <td>normal
          </td>
        </tr>

        <tr>
          <th>Priority</th>
          <td>P
          </td>
        </tr>

        <tr>
          <th>Component</th>
          <td>Register Allocator
          </td>
        </tr>

        <tr>
          <th>Assignee</th>
          <td>unassignedbugs@nondot.org
          </td>
        </tr>

        <tr>
          <th>Reporter</th>
          <td>zyfwong@gmail.com
          </td>
        </tr>

        <tr>
          <th>CC</th>
          <td>llvm-bugs@lists.llvm.org
          </td>
        </tr>

        <tr>
          <th>Classification</th>
          <td>Unclassified
          </td>
        </tr></table>
      <p>
        <div>
        <pre>==== arm.c ====

char add(char b)
{
  return b + 1;
}

==== arm.ll =====
target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
target triple = "armv4t--"

; Function Attrs: minsize norecurse nounwind optsize readnone
define arm_aapcscc zeroext i8 @add(i8 zeroext %b) {
entry:
  %conv = zext i8 %b to i32
  %add = add nuw nsw i32 %conv, 1
  %conv1 = trunc i32 %add to i8
  ret i8 %conv1
}

==== arm.s =====
add:                                    @ @add
    .fnstart
@ BB#0:                                 @ %entry
    add    r0, r0, #1
    and    r0, r0, #255
    bx    lr



$ llc -march=arm arm.ll -enable-ipra=true -print-regusage
add Clobbered Registers: R0 R1 R0_R1 

I think it should be:
$ llc -march=arm arm.ll -enable-ipra=true -print-regusage
add Clobbered Registers: R0 R0_R1</pre>
        </div>
      </p>
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