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<base href="https://llvm.org/bugs/" />
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<body><table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - [x86, AVX2] inconsistent usage of vpbroadcast"
href="https://llvm.org/bugs/show_bug.cgi?id=28505">28505</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>[x86, AVX2] inconsistent usage of vpbroadcast
</td>
</tr>
<tr>
<th>Product</th>
<td>libraries
</td>
</tr>
<tr>
<th>Version</th>
<td>trunk
</td>
</tr>
<tr>
<th>Hardware</th>
<td>PC
</td>
</tr>
<tr>
<th>OS</th>
<td>All
</td>
</tr>
<tr>
<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Severity</th>
<td>normal
</td>
</tr>
<tr>
<th>Priority</th>
<td>P
</td>
</tr>
<tr>
<th>Component</th>
<td>Backend: X86
</td>
</tr>
<tr>
<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
<tr>
<th>Reporter</th>
<td>spatel+llvm@rotateright.com
</td>
</tr>
<tr>
<th>CC</th>
<td>llvm-bugs@lists.llvm.org
</td>
</tr>
<tr>
<th>Classification</th>
<td>Unclassified
</td>
</tr></table>
<p>
<div>
<pre>Noticed this while writing tests for <a class="bz_bug_link
bz_status_NEW "
title="NEW --- - [x86, SSE] recognize that pcmp produces bitmask results"
href="show_bug.cgi?id=28484">bug 28484</a>: we only use a splat load of the
constant for the i32 ands. vpbroadcast in AVX2 should work for all of m8, m16,
m32, m64 and 128/256 vectors. Missing patterns?
Possibly surprising mapping of bool vectors to xmm/ymm is a separate issue.
$ cat vpbroadcast.ll
define <16 x i8> @and16x8(<16 x i1> %a, <16 x i8> %b) {
%and = and <16 x i1> %a, <i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1
1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1>
%zext = zext <16 x i1> %and to <16 x i8>
%add = add <16 x i8> %zext, %b ; force domain
ret <16 x i8> %add
}
define <8 x i16> @and8x16(<8 x i1> %a, <8 x i16> %b) {
%and = and <8 x i1> %a, <i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1>
%zext = zext <8 x i1> %and to <8 x i16>
%add = add <8 x i16> %zext, %b ; force domain
ret <8 x i16> %add
}
define <4 x i32> @and4x32(<4 x i1> %a, <4 x i32> %b) {
%and = and <4 x i1> %a, <i1 1, i1 1, i1 1, i1 1>
%zext = zext <4 x i1> %and to <4 x i32>
%add = add <4 x i32> %zext, %b ; force domain
ret <4 x i32> %add
}
define <2 x i64> @and2x64(<2 x i1> %a, <2 x i64> %b) {
%and = and <2 x i1> %a, <i1 1, i1 1>
%zext = zext <2 x i1> %and to <2 x i64>
%add = add <2 x i64> %zext, %b ; force domain
ret <2 x i64> %add
}
define <32 x i8> @and32x8(<32 x i1> %a, <32 x i8> %b) {
%and = and <32 x i1> %a, <i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1
1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1
1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1>
%zext = zext <32 x i1> %and to <32 x i8>
%add = add <32 x i8> %zext, %b ; force domain
ret <32 x i8> %add
}
define <16 x i16> @and16x16(<16 x i1> %a, <16 x i16> %b) {
%and = and <16 x i1> %a, <i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1
1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1>
%zext = zext <16 x i1> %and to <16 x i16>
%add = add <16 x i16> %zext, %b ; force domain
ret <16 x i16> %add
}
define <8 x i32> @and8x32(<8 x i1> %a, <8 x i32> %b) {
%and = and <8 x i1> %a, <i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1>
%zext = zext <8 x i1> %and to <8 x i32>
%add = add <8 x i32> %zext, %b ; force domain
ret <8 x i32> %add
}
define <4 x i64> @and4x64(<4 x i1> %a, <4 x i64> %b) {
%and = and <4 x i1> %a, <i1 1, i1 1, i1 1, i1 1>
%zext = zext <4 x i1> %and to <4 x i64>
%add = add <4 x i64> %zext, %b ; force domain
ret <4 x i64> %add
}
$ ./llc -o - vpbroadcast.ll -mattr=avx2 | grep vp
vpand LCPI0_0(%rip), %xmm0, %xmm0
vpaddb %xmm1, %xmm0, %xmm0
vpand LCPI1_0(%rip), %xmm0, %xmm0
vpaddw %xmm1, %xmm0, %xmm0
vpbroadcastd LCPI2_0(%rip), %xmm2
vpand %xmm2, %xmm0, %xmm0
vpaddd %xmm1, %xmm0, %xmm0
vpand LCPI3_0(%rip), %xmm0, %xmm0
vpaddq %xmm1, %xmm0, %xmm0
vpand LCPI4_0(%rip), %ymm0, %ymm0
vpaddb %ymm1, %ymm0, %ymm0
vpand LCPI5_0(%rip), %xmm0, %xmm0
vpmovzxbw %xmm0, %ymm0
vpaddw %ymm1, %ymm0, %ymm0
vpand LCPI6_0(%rip), %xmm0, %xmm0
vpmovzxwd %xmm0, %ymm0
vpaddd %ymm1, %ymm0, %ymm0
vpbroadcastd LCPI7_0(%rip), %xmm2
vpand %xmm2, %xmm0, %xmm0
vpmovzxdq %xmm0, %ymm0
vpaddq %ymm1, %ymm0, %ymm0</pre>
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