<html>
    <head>
      <base href="https://llvm.org/bugs/" />
    </head>
    <body><table border="1" cellspacing="0" cellpadding="8">
        <tr>
          <th>Bug ID</th>
          <td><a class="bz_bug_link 
          bz_status_NEW "
   title="NEW --- - 256bit AVX vectorization sometimes forgets about 128bit packed instructions"
   href="https://llvm.org/bugs/show_bug.cgi?id=28457">28457</a>
          </td>
        </tr>

        <tr>
          <th>Summary</th>
          <td>256bit AVX vectorization sometimes forgets about 128bit packed instructions
          </td>
        </tr>

        <tr>
          <th>Product</th>
          <td>clang
          </td>
        </tr>

        <tr>
          <th>Version</th>
          <td>3.8
          </td>
        </tr>

        <tr>
          <th>Hardware</th>
          <td>PC
          </td>
        </tr>

        <tr>
          <th>OS</th>
          <td>All
          </td>
        </tr>

        <tr>
          <th>Status</th>
          <td>NEW
          </td>
        </tr>

        <tr>
          <th>Severity</th>
          <td>normal
          </td>
        </tr>

        <tr>
          <th>Priority</th>
          <td>P
          </td>
        </tr>

        <tr>
          <th>Component</th>
          <td>-New Bugs
          </td>
        </tr>

        <tr>
          <th>Assignee</th>
          <td>unassignedclangbugs@nondot.org
          </td>
        </tr>

        <tr>
          <th>Reporter</th>
          <td>nowak-llvm@tepeserwery.pl
          </td>
        </tr>

        <tr>
          <th>CC</th>
          <td>llvm-bugs@lists.llvm.org
          </td>
        </tr>

        <tr>
          <th>Classification</th>
          <td>Unclassified
          </td>
        </tr></table>
      <p>
        <div>
        <pre>Compiled with: -O3 -ffast-math -Rpass=loop- -fslp-vectorize-aggressive -msse
-msse2 -msse3 -mssse3 -msse4 -msse4.1 -mavx

f1 is correctly vectorized with both 256 and 128 bit packed instructions.
f2 is correctly vectorized with 256 bit packed instructions but remaining 4
iterations are handled with scalar instructions instead of 128 bit packed.

void f1(float *__restrict__ q __attribute__((align_value(32))), float
*__restrict__ p __attribute__((align_value(32)))) {
  for (unsigned int i = 0; i < (8 * 1 + 4); ++i) {
// remark: completely unrolled loop with 12 iterations
    q[i] = p[i] + 1.0f;
  }
}
void f2(float *__restrict__ q __attribute__((align_value(32))), float
*__restrict__ p __attribute__((align_value(32)))) {
  for (unsigned int i = 0; i < (8 * 5 + 4); ++i) {
// remark: vectorized loop (vectorization width: 8, interleaved count: 1)
// remark: completely unrolled loop with 5 iterations
// remark: completely unrolled loop with 4 iterations
    q[i] = p[i] + 1.0f;
  }
}

f1(float*, float*):                              # @f1(float*, float*)
        vmovaps (%rsi), %ymm0
        vaddps  .LCPI0_0(%rip), %ymm0, %ymm0
        vmovaps %ymm0, (%rdi)
        vmovaps 32(%rsi), %xmm0
        vaddps  .LCPI0_1(%rip), %xmm0, %xmm0
        vmovaps %xmm0, 32(%rdi)
        vzeroupper
        retq

f2(float*, float*):                              # @f2(float*, float*)
        vmovaps .LCPI1_0(%rip), %ymm0   # ymm0 =
[1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00]
        vaddps  (%rsi), %ymm0, %ymm1
        vmovaps %ymm1, (%rdi)
        vaddps  32(%rsi), %ymm0, %ymm1
        vmovaps %ymm1, 32(%rdi)
        vaddps  64(%rsi), %ymm0, %ymm1
        vmovaps %ymm1, 64(%rdi)
        vaddps  96(%rsi), %ymm0, %ymm1
        vmovaps %ymm1, 96(%rdi)
        vaddps  128(%rsi), %ymm0, %ymm0
        vmovaps %ymm0, 128(%rdi)
        vmovss  .LCPI1_1(%rip), %xmm0   # xmm0 = mem[0],zero,zero,zero
        vaddss  160(%rsi), %xmm0, %xmm1
        vmovss  %xmm1, 160(%rdi)
        vaddss  164(%rsi), %xmm0, %xmm1
        vmovss  %xmm1, 164(%rdi)
        vaddss  168(%rsi), %xmm0, %xmm1
        vmovss  %xmm1, 168(%rdi)
        vaddss  172(%rsi), %xmm0, %xmm0
        vmovss  %xmm0, 172(%rdi)
        vzeroupper</pre>
        </div>
      </p>
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