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<base href="https://llvm.org/bugs/" />
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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - InstCombine greediness blocks subsequent optimizations"
href="https://llvm.org/bugs/show_bug.cgi?id=28221">28221</a>
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<th>Summary</th>
<td>InstCombine greediness blocks subsequent optimizations
</td>
</tr>
<tr>
<th>Product</th>
<td>libraries
</td>
</tr>
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<th>Version</th>
<td>trunk
</td>
</tr>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>Linux
</td>
</tr>
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<th>Status</th>
<td>NEW
</td>
</tr>
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<th>Severity</th>
<td>normal
</td>
</tr>
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<th>Priority</th>
<td>P
</td>
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<th>Component</th>
<td>Scalar Optimizations
</td>
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>me@manueljacob.de
</td>
</tr>
<tr>
<th>CC</th>
<td>llvm-bugs@lists.llvm.org, sanjoy@playingwithpointers.com, spatel+llvm@rotateright.com
</td>
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<th>Classification</th>
<td>Unclassified
</td>
</tr></table>
<p>
<div>
<pre>This is a more general case of <a class="bz_bug_link
bz_status_RESOLVED bz_closed"
title="RESOLVED FIXED - Optimizer doesn't simplify obvious contradiction"
href="show_bug.cgi?id=27869">Bug 27869</a>.
This is the input IR: (1)
define zeroext i1 @test(i1 %b, i32 %i) {
%conv1 = zext i1 %b to i32
%cmp = icmp slt i32 %i, 0
%conv2 = zext i1 %cmp to i32
%and = and i32 %conv1, %conv2
%tobool = icmp ne i32 %and, 0
ret i1 %tobool
}
This could be optimized to: (2)
define zeroext i1 @test(i1 %b, i32 %i) {
%cmp = icmp slt i32 %i, 0
%res = and i1 %b, %cmp
ret i1 %res
}
But currently this is transformed to: (3)
define zeroext i1 @test(i1 %b, i32 %i) {
%conv1 = zext i1 %b to i32
%i.lobit = lshr i32 %i, 31
%and = and i32 %i.lobit, %conv1
%tobool = icmp ne i32 %and, 0
ret i1 %tobool
}
InstCombine transforms the (zext (< i 0)) pattern into clever bit shifting:
(lshr i 31). At first this saves one operation, but it obfuscates the intent
of the code.
There are two problems:
a) InstCombine (or any other pass) doesn't transform (3) into (2).
b) Because InstCombine is greedy (combining instructions in depth-first order),
the problematic IR in (3) is generated in the first place. If InstCombine
deferred the (zext (< i 0)) -> (lshr i 31) transformation until later, (1)
would have been transformed into (2).</pre>
</div>
</p>
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