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<base href="https://llvm.org/bugs/" />
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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - [Thumb] Crash when running tail merge after basic block placement"
href="https://llvm.org/bugs/show_bug.cgi?id=28049">28049</a>
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<th>Summary</th>
<td>[Thumb] Crash when running tail merge after basic block placement
</td>
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<tr>
<th>Product</th>
<td>libraries
</td>
</tr>
<tr>
<th>Version</th>
<td>trunk
</td>
</tr>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>Linux
</td>
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<th>Status</th>
<td>NEW
</td>
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<th>Severity</th>
<td>normal
</td>
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<th>Priority</th>
<td>P
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<th>Component</th>
<td>Backend: ARM
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>diana.picus@linaro.org
</td>
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<th>CC</th>
<td>llvm-bugs@lists.llvm.org
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<th>Classification</th>
<td>Unclassified
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<p>
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<pre>r271925 broke our thumb selfhosting bot:
<a href="http://lab.llvm.org:8011/builders/clang-cmake-thumbv7-a15-full-sh/builds/3602">http://lab.llvm.org:8011/builders/clang-cmake-thumbv7-a15-full-sh/builds/3602</a>
To quote Haicheng's analysis on the mailing list:
"My patch tries to run Tail Merging after Block Placement to reduce code size.
In the failing case, I have following four consecutive MBBs after the Block
Placement
BB#187: derived from LLVM BB %if.then.i.i.i673
t2Bcc <BB#193>, pred:3, pred:%CPSR<kill>
t2B <BB#188>, pred:14, pred:%noreg
BB#190: derived from LLVM BB %if.then9.i.i.i
t2Bcc <BB#188>, pred:2, pred:%CPSR<kill>
BB#193: derived from LLVM BB %if.then2.i
...
BB#188: derived from LLVM BB %if.end5.i
...
BB#187 and BB#190 are regarded the same (both only contain branches that have
same conditions and same targets) and can be merged. Tail Merging calls
ReplaceTailWithBranchTo() to replace the two branches in BB#187 with an
unconditional branch to BB#190. It seems only Thumb2 overwrites
ReplaceTailWithBranchTo() and all the other targets just use
TargetInstrInfo::ReplaceTailWithBranchTo().
The crash comes from the following five lines of
Thumb2InstrInfo::ReplaceTailWithBranchTo()
// If the first instruction of Tail is predicated, we may have to update
// the IT instruction.
unsigned PredReg = 0;
ARMCC::CondCodes CC = getInstrPredicate(*Tail, PredReg);
MachineBasicBlock::iterator MBBI = Tail;
if (CC != ARMCC::AL)
// Expecting at least the t2IT instruction before it.
--MBBI;
Variable Tail points to the first instruction of BB#187. --MBBI then triggers
the assertion."
Since we probably don't want to disable this for thumb, we should try to fix
the underlying bug and then try to reapply r271925.</pre>
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